參數(shù)資料
型號(hào): ADP3204JCP
廠商: Analog Devices, Inc.
元件分類(lèi): 基準(zhǔn)電壓源/電流源
英文描述: 3-Phase IMVP-II and IMVP-III Core Controller for Mobile CPUs
中文描述: 三相IMVP的,IMVP的第二和第三的核心控制器,用于移動(dòng)CPU
文件頁(yè)數(shù): 3/16頁(yè)
文件大?。?/td> 1315K
代理商: ADP3204JCP
REV. 0
ADP3204
–3–
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
CORE COMPARATOR
Input Offset Voltage (Ramp-Reg)
Input Bias Current
Output Voltage
(OUT1, OUT2, and OUT3)
Propagation Delay Time
V
COREOS
I
REG
, I
RAMP
V
OUT_H
V
t
OUT_L
V
REG
= 1.25 V
V
REG
= V
RAMP
= 1.25 V
V
CC
= 3.0 V
V
CC
= 3.6 V
T
A
= 25
°
C
T
A
= Full Range
±
1.5
±
1
mV
A
V
V
ns
ns
ns
ns
ns
ns
2.5
0
3.0
0.4
35
45
7
7
70
130
Rise and Fall Time
(OUT1, OUT2, and OUT3)
Noise Blanking Time
t
OUT_R7
t
OUT_F7
t
BLNK
OUT L-H Transition
OUT H-L Transition
CURRENT LIMIT COMPARATOR
Input Offset Voltage
Input Bias Current
Propagation Delay Time
V
CLIMOS
I
, I
CS–
t
CS+
V
CS
– = 1.25 V
V
CS+
= 1.25 V
T
A
= 25
°
C
T
A
= Full Range
±
1
–3
55
65
mV
A
ns
ns
CURRENT SENSE
MULTIPLEXER
Trans-Resistance
R
CS1–CS+
,
R
CS2–CS+
,
R
CS3–CS+
MUX switch is ON
MUX switch is OFF
150
50
M
Common-Mode Voltage Range
V
CS1
= V
CS2
= V
CS3
0
2
V
HYSTERESIS SETTING
Hysteresis Current
I
RAMP_H
,
–I
CS+_H
V
REG
= 1.25 V
V
RAMP
= 1.23 V
I
HYSSET
= 10 A
I
HYSSET
= 100 A
V
RAMP
= 1.27 V
I
HYSSET
= 10 A
I
HYSSET
= 100 A
–8
–85
–10
–100
–12
–115
A
A
8
85
10
100
V
DAC
12
115
A
A
Hysteresis Reference Voltage
V
HYSSET
V
CURRENT LIMIT SETTING
Hysteresis Current
I
CS–
V
RAMP
= 1.23 V
V
REG
= V
CS–
= V
COREFB
= 1.25 V
V
CS+
= 1.23 V
I
HYSSET
= 10 A
I
HYSSET
= 100 A
V
CS+
= 1.27 V
I
HYSSET
= 10 A
I
HYSSET
= 100 A
V
CS+
= 1.23 V,
BOM
= L
–27
–270
–31.5
–301.5
–36
–333
A
A
–18
–180
–21.5
–201.5
–25
–223
A
A
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