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參數(shù)資料
| 型號： | ADN4693EBRZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX MLVDS 200MBPS 14SOIC |
| 標準包裝： | 1,000 |
| 系列： | * |
ADN4691E/ADN4693E/ADN4696E/ADN4697E
Data Sheet
Rev. A | Page 16 of 20
APPLICATIONS INFORMATION
M-LVDS extends the low power, high speed, differential
signaling of LVDS (low voltage differential signaling) to
multipoint systems where multiple nodes are connected over
short distances in a bus topology network.
With M-LVDS, a transmitting node drives a differential signal
across a transmission medium such as a twisted pair cable. The
transmitted differential signal allows other receiving nodes that
are connected along the bus to detect a differential voltage that
can then be converted back into a single-ended logic signal by
the receiver.
The communication line is typically terminated at both ends
by resistors (RT), the value of which is chosen to match the
characteristic impedance of the medium (typically 100 Ω).
For half-duplex multipoint applications such as the one shown
in Figure 37, only one driver can be enabled at any time. Full-
duplex nodes allow a master-slave topology as shown in Figure 38.
In this configuration, a master node can concurrently send and
receive data to/from slave nodes. At any time, only one slave
node can have its driver enabled to concurrently transmit data
back to the master node.
RO
NOTES
1. MAXIMUM NUMBER OF NODES: 32.
2. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
RE
AB
R
D
RT
ADN4696E
DE
DI
RO RE
AB
ADN4696E
DE
DI
RO RE
AB
ADN4696E
DE
DI
RO RE
AB
ADN4696E
DE
DI
10
35
5-
0
37
R
D
R
D
R
D
R
D
R
D
R
D
R
D
Figure 37. ADN4696E Typical Half-Duplex M-LVDS Network (Type 2 Receivers with Threshold Offset for Bus-Idle Fail-Safe)
RO
NOTES
1. MAXIMUM NUMBER OF NODES: 32.
2. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED.
RE
AB Z Y
MASTER
SLAVE
RT
ADN4697E
DE
DI
RO RE DE
DI
RO RE DE
DI
AB Z Y
ADN4697E
AB Z Y
ADN4697E
AB Z Y
ADN4697E
RT
RO RE DE
DI
10
35
5-
03
8
R
D
R
D
R
D
R
D
Figure 38. ADN4697E Typical Full-Duplex M-LVDS Master-Slave Network (Type 2 Receivers with Threshold Offset for Bus-Idle Fail-Safe)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADN4694E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4694EBRZ | 功能描述:IC M-LVDS TRANSCEIVER RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 產(chǎn)品培訓(xùn)模塊:RS-232 & USB Transceiver 標準包裝:2,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:296-19849-2 |
| ADN4694EBRZ-RL7 | 功能描述:IC TXRX MLVDS 100MBPS 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標準包裝:121 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADN4695E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4695EBRZ | 功能描述:IC M-LVDS TRANSCEIVER RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標準包裝:98 系列:* |
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