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參數(shù)資料
| 型號： | ADN4693EBRZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX MLVDS 200MBPS 14SOIC |
| 標準包裝： | 1,000 |
| 系列： | * |
Data Sheet
ADN4691E/ADN4693E/ADN4696E/ADN4697E
Rev. A | Page 15 of 20
GLITCH-FREE POWER-UP/POWER-DOWN
To minimize disruption to the bus when adding nodes, the
M-LVDS outputs of the device are kept glitch-free when the
device is powering up or down. This feature allows insertion of
devices onto a live M-LVDS bus because the bus outputs are not
switched on before the device is fully powered. In addition, all
outputs are placed in a high impedance state when the device is
powered off.
FAULT CONDITIONS
short-circuit current protection that protects the part under
fault conditions in the case of short circuits on the bus. This
protection limits the current in a fault condition to 24 mA at
the transmitter outputs for short-circuit faults between 1 V
and +3.4 V. Any network fault must be cleared to avoid data
transmission errors and to ensure reliable operation of the data
network and any devices that are connected to the network.
RECEIVER INPUT THRESHOLDS/FAIL-SAFE
Two receiver types are available, both of which incorporate
protection against short circuits.
25 mV of hysteresis. This ensures that slow-changing signals or
a loss of input does not result in oscillation of the receiver output.
Type 1 receiver thresholds are ±50 mV; therefore, the state of the
receiver output is indeterminate if the differential between A and
B is about 0 V. This state occurs if the bus is idle (approximately 0 V
on both A and B), with no drivers enabled on the attached nodes.
and bus-idle fail-safe. The input threshold is offset by 100 mV so
that a logic low is present on the receiver output when the bus is
idle or when the receiver inputs are open.
The different receiver thresholds for the two receiver types are
output states under various conditions.
TYPE 1 RECEIVER
OUTPUT
LOGIC 1
LOGIC 0
D
IFF
E
R
E
N
TI
A
L
I
N
PU
T
VO
LT
A
GE
(
V
IA
–
V
IB
)[V
]
0.25
0.15
0.05
–0.05
–0.15
0
TYPE 2 RECEIVER
OUTPUT
LOGIC 1
LOGIC 0
UNDEFINED
10
355
-0
36
UNDEFINED
Figure 36. Input Threshold Voltages
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADN4694E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4694EBRZ | 功能描述:IC M-LVDS TRANSCEIVER RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 產(chǎn)品培訓模塊:RS-232 & USB Transceiver 標準包裝:2,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:296-19849-2 |
| ADN4694EBRZ-RL7 | 功能描述:IC TXRX MLVDS 100MBPS 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標準包裝:121 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADN4695E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4695EBRZ | 功能描述:IC M-LVDS TRANSCEIVER RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:* 標準包裝:98 系列:* |
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