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| 型號(hào)： | ADN4664BRZ-REEL7 |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC RCVR DIFF LVDS 2CH 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類(lèi)型： | 線(xiàn)路接收器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 0/2 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
ADN4664
Rev. 0 | Page 4 of 12
AC CHARACTERISTICS
Table 2.
Parameter
Symbol
Min
Typ2
Max
Unit
Conditions/Comments3
Differential Propagation Delay High to Low
tPHLD
1.0
2.15
2.5
ns
Differential Propagation Delay Low to High
tPLHD
1.0
2.03
2.5
ns
tSKD1
0
80
400
ps
Differential Channel-to-Channel Skew
(Same Device)5
tSKD2
0
100
500
ps
Differential Part-to-Part Skew6
tSKD3
1.0
ns
Differential Part-to-Part Skew7
tSKD4
1.5
ns
Rise Time
tTLH
510
800
ps
Fall Time
tTHL
445
800
ps
Maximum Operating Frequency8
fMAX
200
250
MHz
All channels switching
1 CL includes probe and jig capacitance.
2 All typicals are given for VCC = 3.3 V, TA = 25°C.
3 Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50 Ω, tTLH and tTHL (0% to 100%) ≤ 3 ns for RINx+, RINx.
4 tSKD1 is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel.
5 Channel-to-channel skew, tSKD2, is the defined as the difference between the propagation delay of one channel and the propagation delay of the other channel on the
same chip with any event on the inputs.
6 tSKD3, part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC and within 5°C of
each other within the operating temperature range.
7 tSKD4, part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended operating
temperature and voltage ranges, and across process distribution. tSKD4 is defined as |maximum minimum| differential propagation delay.
8 fMAX generator input conditions: f = 200 MHz, tTLH = tTHL < 1 ns (0% to 100%), 50% duty cycle, differential (1.05 V to 1.35 V peak-to-peak). Output criteria: 60%/40% duty
cycle, VOL (maximum 0.4 V), VOH (minimum 2.7 V), load = 15 pF (stray plus probes).
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