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參數(shù)資料
| 型號： | ADN4664BRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RCVR DIFF LVDS 2CH 8SOIC |
| 標準包裝： | 1,000 |
| 類型： | 線路接收器 |
| 驅動器/接收器數(shù)： | 0/2 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
ADN4664
Rev. 0 | Page 11 of 12
THEORY OF OPERATION
The ADN4664 is a dual line receiver for low voltage differential
signaling. It takes a differential input signal of 310 mV typically
and converts it into a single-ended 3 V TTL/CMOS logic signal.
A differential current input signal, received via a transmission
medium, such as a twisted pair cable, develops a voltage across
a terminating resistor, RT. This resistor is chosen to match the
characteristic impedance of the medium, typically around
100 Ω. The differential voltage is detected by the receiver and
converted back into a single-ended logic signal.
When the noninverting receiver input, RINx+, is positive with
respect to the inverting input RINx (current flows through RT
from RINx+ to RINx), then ROUTx is high. When the noninverting
receiver input RINx+ is negative with respect to the inverting
input RINx (current flows through RT from RINx to RINx+), then
ROUTx is low.
The ADN4664 differential line receiver is capable of receiving
signals of 100 mV over a ±1 V common-mode range centered
around 1.2 V. This relates to the typical driver offset voltage
value of 1.2 V. The signal originating from the driver is centered
around 1.2 V and may shift ±1 V around this center point. This
±1 V shifting may be caused by a difference in the ground
potential of the driver and receiver, the common-mode effect
of coupled noise, or both.
Using the ADN4663 as a driver, the received differential current
is between 2.5 mA and 4.5 mA (typically 3.1 mA), developing
between 250 mV and 450 mV across a 100 Ω termination resis-
tor. The received voltage is centered around the receiver offset of
1.2 V. In other words, the noninverting receiver input is typically
(1.2 V + [310 mV/2]) = 1.355 V, and the inverting receiver input is
(1.2 V [310 mV/2]) = 1.045 V for Logic 1. For Logic 0 the inverting
and noninverting input voltages are reversed. Note that because
the differential voltage reverses polarity, the peak-to-peak voltage
swing across RT is twice the differential voltage.
Current mode signaling offers considerable advantages over
voltage mode signalling, such as RS-422. The operating current
remains fairly constant with increased switching frequency,
whereas with voltage mode drivers the current increases
exponentially in most cases. This is caused by the overlap as
internal gates switch between high and low, which causes cur-
rents to flow from VCC to ground. A current mode device simply
reverses a constant current between its two outputs, with no
significant overlap currents.
This is similar to emitter-coupled logic (ECL) and positive emitter-
coupled logic (PECL), but without the high quiescent current of
ECL and PECL.
APPLICATIONS INFORMATION
Figure 23 shows a typical application for point-to-point data
transmission using the ADN4663 as the driver.
DINy
DOUTy–
ROUTx
RINx–
DOUTy+
RINx+
100
RT
0.1F
10F
TANTALUM
10F
TANTALUM
+
VCC
0.1F
VCC
GND
ADN4663
ADN4664
3.3V
07
96
1-
1
19
Figure 23. Typical Application Circuit
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相關代理商/技術參數(shù) |
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| ADN4665 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V, LVDS, Quad, CMOS Differential Line Driver |
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| ADN4665ARUZ-REEL7 | 功能描述:IC DRIVER DIFF LVDS QUAD 16TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 標準包裝:121 系列:- 類型:收發(fā)器 驅動器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應商設備封裝:10-DFN（3x3） 包裝:管件 |
| ADN4665ARZ | 功能描述:IC DRIVER DIFF LVDS QUAD 16SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓模塊:RS-232 & USB Transceiver 標準包裝:2,000 系列:- 類型:收發(fā)器 驅動器/接收器數(shù):1/1 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:296-19849-2 |
| ADN4665ARZ | 制造商:Analog Devices 功能描述:CMOS Differential Line Driver IC |
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