參數(shù)資料
型號(hào): ADM6996F
廠商: INFINEON TECHNOLOGIES AG
英文描述: 6 port 10/100 Mb/s Single Chip Ethernet Switch Controller
中文描述: 6端口10/100 Mb / s的單芯片以太網(wǎng)交換機(jī)控制器
文件頁(yè)數(shù): 28/69頁(yè)
文件大小: 2099K
代理商: ADM6996F
ADM6996F
Function Description
3.15.2 Address Recognition and Packet Forwarding
The ADM6996F forwards the incoming packets between bridged ports according to the
Destination Address (DA) as below. All the packet forwarding will check VLAN first.
Forwarding port must same VLAN with source port.
1) If the DA is an UNICAST address and the address was found in the Address
Table, the ADM6996F will check the port number and acts as follows:
If the port number is equal to the port on which the packet was received,
the packet is discarded.
If the port number is different, the packet is forwarded across the bridge.
2) If the DA is an UNICAST address and the address was not found, the ADM6996F
treats it as a multicast packet and forwards across the bridge.
3) If the DA is a Multicast address, the packet is forwarded across the bridge.
4) If the DA is PAUSE Command (01-80-C2-00-00-01), then this packet will be
dropped by ADM6996F. ADM6996F can issue and learn PAUSE command.
5) ADM6996F will forward the packet with DA of ( 01-80-C2-00-00-00 ), filter out
the packet with DA of ( 01-80-C2-00-00-01 ), and forward the packet with DA of
( 01-80-C2-00-00-02 ~ 01-80-C2-00-00-0F )
3.15.3 Address Aging
Address aging is supported for topology changes such as an address moving from one
port to the other. When this happens, the ADM6996F internally has a 300 seconds timer
will aged out (remove) the address from the address table. Aging function can
enable/disable by user. Normally, disabling aging function is for security purpose.
3.15.4 Back off Algorithm
The ADM6996F implements the truncated exponential back off algorithm compliant to
the 802.3 CSMA-CD standard. ADM6996F will restart the back off algorithm by
choosing 0-9 collision counts. The ADM6996F resets the collision counter after 16
consecutive retransmit trials.
3.15.5 Inter-Packet Gap (IPG)
IPG is the idle time between any two successive packets from the same port. The typical
number is 96 bits time. The value is 9.6us for 10Mbps ETHERNET, 960ns for 100Mbps
fast ETHERNET and 96ns for 1000M. ADM6996F provide option of 92 bit gap in
EEPROM to prevent packet lost when turn off Flow Control and clock P.P.M. value
difference.
Infineon-ADMtek Co Ltd.
3-10
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