參數(shù)資料
型號: ADL5519ACPZ-WP
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: 1 MHz to 10 GHz, 50 dB Dual Log Detector/Controller
中文描述: DUAL LOG OR ANTILOG AMPLIFIER, 10000 MHz BAND WIDTH, QCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-2, LFCSP-32
文件頁數(shù): 19/27頁
文件大?。?/td> 479K
代理商: ADL5519ACPZ-WP
Preliminary Technical Data
ADL5519
increase until the power on the two input channels is equal,
resulting in a signal chain gain of unity.
Rev. PrB | Page 19 of 27
If a gain other than 0 dB is required, an attenuator can be used
in one of the RF paths, as shown in Figure 21. Alternatively,
power splitters or directional couplers of different coupling
factors can be used. Another convenient option is to apply a
voltage on VLVL other than OUTA. Refer to Equation 11 and
the Controller Mode section for more detail.
If the VGA/VVA has a positive gain control sense, the OUTN
output of the difference amplifier can be used with the
integrating capacitor tied back to FBKB.
The choice of the integrating capacitor affects the response time
of the AGC loop. Small values give a faster response time but
can result in instability, whereas larger values reduce the response
time. Note that in this mode, the capacitors on CLPA and CLPB,
which perform the rms averaging function, must still be used
and also affect the loop response time.
CHANNEL A
Log Detector
CHANNEL B
Log Detector
CLPB
CLPA
VLVL
INHB
INLB
INLA
INHA
VSTA
VSTB
OUTB
FBKB
OUTN
OUTP
FBKA
OUTA
ADL5519
C
INT
DIFF OUT +
0.1
μ
F
0.1
μ
F
ATTENUATOR
VGA/VVA
DIRECTIONAL
OR
POWER SPLITTER
DIRECTIONAL
OR
POWER SPLITTER
50
Ω
0.1
μ
F
0.1
μ
F
50
Ω
Figure 21. Operation in Controller Mode for Automatic Gain Control
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