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參數(shù)資料
| 型號： | ADL5519ACPZ-WP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | 1 MHz to 10 GHz, 50 dB Dual Log Detector/Controller |
| 中文描述： | DUAL LOG OR ANTILOG AMPLIFIER, 10000 MHz BAND WIDTH, QCC32 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-2, LFCSP-32 |
| 文件頁數(shù)： | 15/27頁 |
| 文件大?。?/td> | 479K |
| 代理商： | ADL5519ACPZ-WP |
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Preliminary Technical Data
ADL5519
POWER-DOWN INTERFACE
The operating and stand-by currents for the ADL5519 at
25°C are approximately 65 mA and 1 mA, respectively. The
PWDN and ADJ[A,B] pins are connected to the base of
and NPN transistor to force a power down condition.
Typically, when PWDN is pulled >2.5 V, the ADL5519 is
powered down from 65mA to <1mA. The output reaches
to within 0.1 dB of its steady-state value in about 1.6 μs; the
reference voltage is available to full accuracy in a much
shorter time. This wake-up response time varies depending
on the input coupling network and the capacitance at pins
CLP[A, B].
Rev. PrB | Page 15 of 27
The individual log channels can be disabled by installing a
0Ω pull up resistor from ADJ[A,B] to VPS[A,B].
SETPOINT INTERFACE, VST[A, B]
The V
SET
input drives the high impedance (20 kΩ) input of
an internal op amp. The V
SET
voltage appears across the
internal 1.5 k
Ω
resistor to generate I
SET
. When a portion of
V
OUT
is applied to VSET, the feedback loop forces
I
D
× log
10
(
V
IN
/
V
INTERCEPT
) =
I
SET
.
If
V
SET
=
V
OUT
/2x, then
I
SET
=
V
OUT
/(2x × 1.5 k
Ω
).
The result is
V
OUT
= (
I
D
× 1.5 k
Ω
× 2x) × log
10
(
V
IN
/
V
INTERCEPT
)
0
1.5k
Ω
I
SET
COMM
VSET
V
SET
COMM
20k
Ω
20k
Ω
Figure 14. VST[A, B] Interface Simplified Schematic
The slope is given by –
I
D
× 2x × 1.5 k
Ω
= 22 mV/dB × x. For
example, if a resistor divider to ground is used to generate a
V
SET
voltage of V
OUT
/2, then x = 2. The slope is set to 880
V/decade or 44 mV/dB.
OUTPUT INTERFACE, OUT[A, B]
The OUT[A,B] pin is driven by a PNP output stage. An
internal 10 Ω resistor is placed in series with the output and
the OUT[A,B] pin. The rise time of the output is limited
mainly by the slew on CLP[A,B]. The fall time is an RC-
limited slew given by the load capacitance and the pull-
down resistance at OUT[A,B]. There is an internal pull-
down resistor of 1.6 kΩ. A resistive load at OUT[A,B] is
placed in parallel with the internal pull-down resistor to
provide additional discharge current.
OUT[A, B]
VPS[A, B]
CLP[A,B]
1.2k
Ω
400
Ω
COMR
Figure 15. OUT[A, B] Interface Simplified Schematic
OUT[A, B] can source and sink up to 2.2 mA.
DIFFERENCE OUTPUT, OUT[P, N]
The ADL5519 incorporates two operational amplifiers with
rail-to-rail output capability to provide a channel difference
output.
OUTP
VPSR
VLVL
FBKA
COMR
OUTA
OUTB
0
OUTN
VPSR
VLVL
FBKB
COMR
OUTB
OUTA
1k
Ω
1k
Ω
1k
Ω
1k
Ω
1k
Ω
1k
Ω
1k
Ω
1k
Ω
Figure 16. OUT[P, N] Interface Simplified Schematic
As in the case of the output drivers for OUT[A, B], the output
stages have the capability of driving 2.2 mA. OUTA and OUTB
are internally connected through 1 kΩ resistors to the inputs of
each op amp. The pin VLVL is connected to the positive terminal
of both op amps through 1 kΩ resistors to provide level shifting.
The negative feedback terminal is also made available through a
1 kΩ resistor. The input impedance of VLVL is 1 kΩ and
FBK[A, B] is 2 kΩ. See Figure 17 for the connections of these
pins.
FBK
OUT
OUT
FBK
B
N
P
A
OUTB
OUTA
27
28
29
30
Figure 17. Op Amp Connections (All Resistors are 1 kΩ ± 20%)
If OUTP is connected to FBKA, then OUTP is given as
OUTP
=
OUTA
–
OUTB
+
VLVL
(9)
If OUTN is connected to FBKB, then OUTN is given as
OUTN
=
OUTB
–
OUTA
+
VLVL
(10)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADL5519-EVALZ | 1 MHz to 10 GHz, 50 dB Dual Log Detector/Controller |
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| ADL5521 | 400 MHz - 4 GHz Low Noise Amplifier |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADL5519-EVALZ | 制造商:Analog Devices 功能描述:DUAL LOG DETECTOR/CNTRLR DUAL 5.5V - Bulk 制造商:Analog Devices 功能描述:EVAL BOARD, ADL5519 LOG DETECTOR/CTRL, Silicon Manufacturer:Analog Devices, Sili 制造商:Analog Devices 功能描述:EVAL BOARD, ADL5519 LOG DETECTOR/CTRL, Silicon Manufacturer:Analog Devices, Silicon Core Number:ADL5519, Kit Application Type:RF / IF, Kit Contents:Eval Board ADL5519, Features:(Not Applicable) |
| ADL5519XCPZ | 制造商:Analog Devices 功能描述:PREPRODUCTION DEVICES ADL5519 - Trays |
| ADL5521 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MHz - 4000 MHz Low Noise Amplifier |
| ADL5521_08 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MHz - 4000 MHz Low Noise Amplifier |
| ADL5521ACPZ | 制造商:Analog Devices 功能描述:SINGLE LNA WITH LOW GAIN - Rail/Tube |
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