參數(shù)資料
型號: ADL5310ACPZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 9/20頁
文件大?。?/td> 0K
描述: IC CONV DUAL LOGARITHMIC 24LFCSP
設(shè)計(jì)資源: Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056)
Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
標(biāo)準(zhǔn)包裝: 1
類型: 對數(shù)轉(zhuǎn)換器
應(yīng)用: 光纖
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 772 (CN2011-ZH PDF)
其它名稱: ADL5310ACPZ-REEL7DKR
ADL5310
Rev. A | Page 17 of 20
EVALUATION BOARD
An evaluation board is available for the ADL5310 (Figure 40 shows the schematic). It can be configured for a wide variety of experiments.
The gain of each buffer amp is factory-set to unity, providing a slope of 200 mV/dec, and the intercept is set to 300 pA. Table 4 describes
the various configuration options.
Table 4. Evaluation Board Configuration Options
Component
Function
Default Condition
P1
Supply Interface. Provides access to the Supply Pins VNEG, COMM, and
VPOS.
P1 = installed
P2, R1, R3, R8, R9,
R17, R22, R25, R30
Monitor Interface. By adding 0 resistors to R1, R3, R8, R9, R17, R22, and
R25, the VRDZ, VREF, VSUM, BIN1, BIN2, OUT1, and OUT2 pin voltages
can be monitored using a high impedance probe. VBIAS allows for the
external bias voltages to be applied to J1 and J2. If R30 = 0 ,
VBIAS = VREF.
P2 = not installed
R1 = R3 = R8 = open (size 0402)
R9 = R17 = open (size 0402)
R22 = R25 = R30 = open (size 0402)
R5, R6, R7, R16,
R18, R19, R20,
R21, R31, R32, C4,
C14, C15, C16,
C19, C20
Buffer Amplifier/Output Interface. The logarithmic slopes of the ADL5310
can be altered using each buffer’s gain-setting resistors, R5 and R6, and
R18 and R19. R7, R16, R31, R32, C19, and C20 allow for variation in the
buffer loading. R20, R21, C4, C14, C15, and C16 are provided for a variety
of filtering applications.
R5 = R19 = 0 (size 0402)
R7 = R16 = 0 (size 0402)
R20 = R21 = 0 (size 0402)
R6 = R18 = open (size 0402)
R31 = R32 = open (size 0402)
C4 = C14 = open (size 0402)
C19 = C20 = open (size 0402)
C15 = C16 = open (size 0402)
LOG1 = OUT1 = installed
LOG2 = OUT2 = installed
R2, R28, R29
Intercept Adjustment. The voltage dropped across Resistors R28 and R29
determines the intercept reference current for each log amp, nominally
set to 3 A using a 665 k 1% resistor. R2 can be used to adjust the
output offset voltage at the LOG1 and LOG2 outputs.
R28 = R29 = 665 k (size 0402)
R2 = 0 (size 0402)
R4, R10, R11, C2,
C3, C5, C6, C8, C9
Supply Decoupling.
C2 = C5 = C9 = 100 pF (size 0402)
C3 = C6 = C8 = 0.01 F (size 0402)
R4 = R10 = R11 = 0 (size 0402)
C1, C7
Filtering VSUM.
C1 = C7 = 0.01 F (size 0402)
R12, R13, R14,
R15, C10, C11,
C12, C13
Input Compensation. Provides essential HF compensation at the Input
Pins INP1, INP2, IRF1, and IRF2.
R12 = R15 = 1 k (size 0402)
R13 = R14 = 2 k (size 0402)
C10 = C13 = 1 nF (size 0402)
C11 = C12 = 4.7 nF (size 0402)
IREF, INPT
Input Interface. The test board is configured to accept current through the
SMA connectors labeled INP1 and INP2. Through-holes are provided to
connect photodiodes in place of the INP1 and INP2 SMAs for optical
interfacing. By removing R28 (R29 for INP2), a second current can be
applied to the IRF1 (IRF2 for INP2) input (also SMA) for evaluating the
ADL5310 in log ratio applications.
IREF = INPT = installed
J1, J2
SC-Style Photodiode. Provides for the direct mounting of SC-style
photodiodes.
J1 = J2 = open
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