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| 型號： | ADL5310ACP-R2 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LOGARITHMIC CONV DUAL 24LFCSP |
| 產(chǎn)品變化通告： | Product Discontinuance 27/July/2010 |
| 設(shè)計資源： | Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056) Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector |
| 標準包裝： | 1 |
| 類型： | 對數(shù)轉(zhuǎn)換器 |
| 應(yīng)用： | 光纖 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 標準包裝 |
| 其它名稱： | ADL5310ACP-R2DKR |
ADL5310
Rev. A | Page 12 of 20
The voltage VLOG is generated by applying ILOG to an internal
resistance of 4.55 k, formed by the parallel combination of a
6.69 k resistor to ground and a 14.2 k resistor to Pin VRDZ
(typically tied to the 2.5 V reference, VREF). At the LOG1
(LOG2) pin, the output current ILOG generates a voltage of
VLOG = ILOG × 4.55 k
= 44 A × 4.55 k × log10(IPD/IINTC)
(5)
= VY log10(IPD/IINTC)
where VY = 200 mV/decade or 10 mV/dB. Note that any resis-
tive loading on LOG1 (LOG2) lowers this slope and results in
an overall scaling uncertainty. This is due to the variability of
the on-chip resistors compared to the off-chip load. As a con-
sequence, this practice is not recommended.
VLOG may also swing below ground when dual supplies (VP and
VN) are used. When VN = 0.5 V or larger, the input Pins INP1
(INP2) and IRF1 (INP2) may be positioned at ground level
simply by grounding VSUM. Care must be taken to limit the
power consumed by the input BJT devices when using a larger
negative supply, because self-heating degrades the accuracy at
higher currents.
MANAGING INTERCEPT AND SLOPE
When using a single supply, VRDZ should be directly connected
to VREF to allow operation over the entire 6-decade input
current range. As noted in the Theory section, this introduces
an accurate offset voltage of 0.8 V at the LOG1 and LOG2 pins,
equivalent to four decades, resulting in a logarithmic transfer
function that can be written as
VLOG = VY log10(104 × IPD/IREF)
= VY log10(IPD/IINTC)
(6)
where IINTC = IREF/104.
Thus, the effective intercept current IINTC is only one ten-
thousandth of IREF, corresponding to 300 pA when using the
recommended value of IREF = 3 A.
The slope can be reduced by attaching a resistor between the log
amp output pin, LOG1 or LOG2, and ground. This is strongly
discouraged given that the on-chip resistors do not ratio
correctly to the added resistance. Also, it is rare that one would
wish to lower the basic slope of 10 mV/dB; if this is needed, it
should be effected at the low impedance output of the buffer
amps, which are provided to avoid such miscalibration and to
allow higher slopes to be used.
Each of the ADL5310’s buffers is essentially an uncommitted
operational amplifier with rail-to-rail output swing, good load-
driving capabilities, and a typical unity-gain bandwidth of
15 MHz. In addition to allowing the introduction of gain, using
standard feedback networks and thereby increasing the slope
voltage VY, the buffer can be used to implement multipole, low-
pass filters, threshold detectors, and a variety of other functions.
Further details on these applications can be found in the
AD8304 data sheet.
RESPONSE TIME AND NOISE CONSIDERATIONS
The response time and output noise of the ADL5310 are funda-
mentally a function of the signal current, IPD. For small currents,
output low frequency voltage-noise spectral-density is a
values of IREF. Details of the noise and bandwidth performance
of translinear log amps can be found in the AD8304 data sheet.
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