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參數(shù)資料
| 型號(hào)： | ADL5306ACPZ-R2 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC16 |
| 封裝： | 3 X 3 MM, MO-220VEED-2, LFCSP-16 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 1015K |
| 代理商： | ADL5306ACPZ-R2 |
ADL5306
Rev. 0 | Page 12 of 16
The use of a negative supply, VN, allows the summing node to be
placed at ground level whenever the input transistor (Q1 in
Figure 1) has a sufficiently negative bias on its emitter. When
VN = –0.5 V, the VCE of Q1 and Q2 will be the same value as in
the default case when VSUM is grounded. This bias need not be
accurate, and a poorly defined source can be used. However, the
source must be able to support the quiescent current as well as
the INPT and IREF signal current. For example, it may be
convenient to utilize a forward-biased junction voltage of about
0.7 V or a Schottky barrier voltage of a little over 0.5 V. With the
summing node at ground, the ADL5306 may now be used as a
voltage-input log amp, at either the numerator input INPT or
the denominator input IREF by inserting a suitably scaled
resistor from the voltage source to the relevant pin. The overall
accuracy for small input voltages is limited by the voltage offset
at the inputs of the JFET op amps.
DC MATRIX / DC SUPPLIES / DMM
RIBBON
CABLE
ADL5306
CHARACTERIZATION
BOARD
TRIAX CONNECTORS
(SIGNAL – INPT AND IREF
GUARD – VSUM
SHIELD – GROUND)
KEITHLEY 236
VSUM
VLOG
VOUT
BFIN
VNEG
VPOS
VREF
IREF
INPT
03727-0-024
Figure 24. Primary Characterization Setup
The primary characterization setup shown in Figure 24 is used
to measure VREF, the static (dc) performance, logarithmic
conformance, slope and intercept, the voltages appearing at Pins
VSUM, INPT
, and IREF, and the buffer offset and VREF drift
with temperature. In some cases, a fixed resistor between Pins
VREF and IREF was used in place of a precision current source.
For the dynamic tests, including noise and bandwidth
measurements, more specialized setups are required. This
includes close attention to the input stabilizing networks; for
example, to ensure stable operation over the full current range
of IREF and temperature extremes, filter components C1 = 4.7 nF
and R13 = 2 k are used at Pin IREF to ground.
The use of a negative supply also allows the output to swing
below ground, thereby allowing the intercept to correspond to a
midrange value of IPD. However, the voltage VLOG remains
referenced to the ACOM pin, and while VLOG does not swing
negative for default operating conditions, it is free to do so.
Thus, adding a resistor from VLOG to the negative supply
lowers all values of VLOG, which raises the intercept. The
disadvantage of this method is that the slope is reduced by the
shunting of the external resistor, and the poorly defined ratio of
on-chip and off-chip resistance causes errors in both the slope
and intercept. A more accurate method for repositioning the
intercept follows.
NC
INPT
VREF
IREF
SCAL
BFIN
VPOS
0.1
F
+VS
COMM
VNEG
VSUM
VOUT
VLOG
1
2
3
4
567
8
9
10
11
12
13
14
15
16
ADL5306
03727-0-025
AD8138
EVALUATION
BOARD
HP3577A
NETWORK ANALYZER
+IN
B
A
BNC-T
AD8138 PROVIDES DC OFFSET
OUTPUT INPUT R INPUT A INPUT B
CHARACTERIZATION METHODS
During the characterization of the ADL5306, the device was
treated as a precision current-input logarithmic converter,
because it is impractical to generate accurate photocurrents by
illuminating a photodiode. The test currents were generated by
using either a well-calibrated current source, such as the
Keithley 236, or a high value resistor from a voltage source to
the input pin. Great care is needed when using very small input
currents. For example, the triax output connection from the
current generator was used with the guard tied to VSUM. The
input trace on the PC board was guarded by connecting
adjacent traces to VSUM.
These measures are needed to minimize the risk of leakage
current paths. With 0.5 V as the nominal bias on the INPT pin,
a leakage-path resistance of 1 G to ground would subtract
0.5 nA from the input, which amounts to a –0.44 dB error for a
10 nA source current. Additionally, the very high output
resistance at the input pins and the long cables commonly
needed during characterization allow 60 Hz and RF emissions
to introduce substantial measurement errors. Careful guarding
techniques are essential to reducing the pickup of these
spurious signals.
Figure 25. Configuration for Buffer Amplifier Bandwidth Measurement
Figure 25 shows the configuration used to measure the buffer
amplifier bandwidth. The AD8138 evaluation board includes
provisions to offset VLOG at the buffer input, allowing
measurements over the full range of IPD using a single supply.
The network analyzer input impedances are set to 1 M.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADL5306ACPZ-REEL7 | 功能描述:IC CONV LOGARITHMIC 60DB 16LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| ADL5306-EVAL | 制造商:Analog Devices 功能描述:Evaluation Board For IC Log Amp Single 5.5V 制造商:Analog Devices 功能描述:LOG AMP SGL 5.5V - Bulk |
| ADL5310 | 制造商:AD 制造商全稱:Analog Devices 功能描述:120 dB Range (3 nA to 3 mA) Dual Logarithmic Converter |
| ADL5310ACP | 制造商:Rochester Electronics LLC 功能描述:LOGARITHMIC CONVERTER - Bulk |
| ADL5310ACP-R2 | 功能描述:IC LOGARITHMIC CONV DUAL 24LFCSP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
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