- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11396 > ADG792ABCPZ-REEL (Analog Devices Inc)IC MUX/DEMUX TRIPLE 4X1 24LFCSP PDF資料下載
參數(shù)資料
| 型號： | ADG792ABCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX/DEMUX TRIPLE 4X1 24LFCSP |
| 產(chǎn)品變化通告： | ADG79xx Discontinuance Notice 17/Aug/2010 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 多路復(fù)用器/多路分解器 |
| 電路： | 3 x 4:1 |
| 導(dǎo)通狀態(tài)電阻： | 4 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3V，5V |
| 電流 - 電源： | 1nA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 800 (CN2011-ZH PDF) |
| 其它名稱： | ADG792ABCPZ-REELDKR |
ADG792A/ADG792G
Rev. 0 | Page 17 of 24
THEORY OF OPERATION
The ADG792A/ADG792G are monolithic CMOS devices, each
comprising three 4:1 multiplexer/demultiplexers controllable
via a standard I2C serial interface. The CMOS process provides
ultralow power dissipation yet it delivers high switching speed
The on resistance profile is very flat over the full analog input
range and the wide bandwidth ensures excellent linearity and
low distortion. These features, combined with a wide input
signal range, make the ADG792A/ADG792G the ideal switching
solution for a wide range of TV applications.
The switches conduct equally well in both directions when on.
In the off condition, signal levels up to the supplies are blocked.
The integrated serial I2C interface controls the operation of the
multiplexers and general-purpose logic pins.
The ADG792A/ADG792G have many attractive features, such
as the ability to individually control each multiplexer, the option
of reading back the status of any switch, and two general-purpose
logic output pins controllable through the I2C interface (available
with the ADG792G only). The following sections describe these
features in more detail.
I2C SERIAL INTERFACE
The ADG792A/ADG792G are controlled via an I2C-compatible
serial bus interface (refer to the I2C-Bus Specification available
from Philips Semiconductor) that allows the part to operate as
a slave device (no clock is generated by either the ADG792A or
the ADG792G). The communication protocol between the I2C
master and the device operates as follows:
1.
The master initiates data transfer by establishing a start
condition defined as a high to low transition on the SDA
line while SCL is high. This indicates that an address/data
stream follows. All slave devices connected to the bus
respond to the start condition and shift in the next eight
bits, consisting of a seven bit address (MSB first) plus an
R/W bit. This bit determines the direction of the data flow
during the communication between the master and the
addressed slave device.
2.
The slave device whose address corresponds to the
transmitted address responds by pulling the SDA line
low during the ninth clock pulse (this is termed the
acknowledge bit).
At this stage, all other devices on the bus remain idle while
the selected device waits for data to be written to, or read
from, its serial register. If the R/W bit is set high, the master
reads from the slave device. However, if the R/W bit is set
low, the master writes to the slave device.
3.
Data transmits over the serial bus in sequences of nine clock
pulses (eight data bits followed by an acknowledge bit).
The transitions on the SDA line must occur during the low
period of the clock signal, SCL, and remain stable during
the high period of SCL, because a low-to-high transition
when the clock signal is high can be interpreted as a stop
event which ends the communication between the master
and the addressed slave device.
4.
After transferring all data bytes, the master establishes a
stop condition, defined as a low to high transition on the
SDA line while SCL is high. In write mode, the master
pulls the SDA line high during the tenth clock pulse to
establish a stop condition. In read mode, the master issues
a no acknowledge for the ninth clock pulse (the SDA line
remains high). The master then brings the SDA line low
before the tenth clock pulse, and then high during the
tenth clock pulse to establish a stop condition.
I2C ADDRESS
The ADG792A/ADG792G has a seven-bit I2C address. The four
most significant bits are internally hardwired and the last three
bits (A0, A1, and A2) are user-adjustable. This allows the user
to connect up to eight ADG792A/ADG792Gs to the same bus.
The I2C bit map shows the configuration of the seven-bit
address.
Seven-Bit I2C Address Bit Configuration
MSB
LSB
1
0
1
0
A2
A1
A0
WRITE OPERATION
When writing to the ADG792A/ADG792G, the user must
begin with an address byte and R/W bit, after which time
the switch acknowledges that it is prepared to receive data
by pulling SDA low. Data is loaded into the device as a 16-bit
word under the control of a serial clock input, SCL. Figure 31
illustrates the entire write sequence for the ADG792A/ADG792G.
The first data byte (AX7 to AX0) controls the status of the
switches and the LDSW and RESETB bits from the second byte
control the operation mode of the device. Table 6 shows a list of
all commands supported by the ADG792A/ADG792G with the
corresponding byte that needs to be loaded during a write
operation.
To achieve the desired configuration, one or more commands
can be loaded into the device. Any combination of the commands
listed in Table 6 can be used with the following restrictions:
Only one switch from a given multiplexer can be on at any
given time.
When a sequence of successive commands affect the same
element (that is, the switch or GPO pin), only the last
command is executed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GRM31A7U2J470JW31D | CAP CER 47PF 630V 5% U2J 1206 |
| GRM31A7U2J390JW31D | CAP CER 39PF 630V 5% U2J 1206 |
| GRM31A7U2J270JW31D | CAP CER 27PF 630V 5% U2J 1206 |
| GRM31A7U2J220JW31D | CAP CER 22PF 630V 5% U2J 1206 |
| MAX4658ESA+ | IC SWITCH SPST 8SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADG792ACCPZ-500RL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IC-Compatible, Wide Bandwidth, Triple 4:1 Multiplexer |
| ADG792ACCPZ-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:IC-Compatible, Wide Bandwidth, Triple 4:1 Multiplexer |
| ADG792G | 制造商:AD 制造商全稱:Analog Devices 功能描述:IC-Compatible, Wide Bandwidth, Triple 4:1 Multiplexer |
| ADG792GBCPZ-500RL7 | 制造商:Analog Devices 功能描述:Analog Multiplexer Triple 4:1 24-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:ANLG MUX TRIPLE 4:1 5V 24LFCSP - Tape and Reel |
| ADG792GBCPZ-REEL | 功能描述:IC MUX/DEMUX TRIPLE 4X1 24LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 功能:開關(guān) 電路:2 x SPST - NC/NO 導(dǎo)通狀態(tài)電阻:8 歐姆 電壓電源:單電源 電壓 - 電源，單路/雙路(±):2.3 V ~ 4.3 V 電流 - 電源:1µA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-UFQFN 供應(yīng)商設(shè)備封裝:8-迷你型QFN（1.4x1.4） 包裝:剪切帶 (CT) 其它名稱:DG2738DN-T1-E4CT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。