參數(shù)資料
型號: ADG5233BCPZ-RL7
廠商: Analog Devices Inc
文件頁數(shù): 3/24頁
文件大?。?/td> 0K
描述: IC SWITCH SPDT TRIPLE 16LFCSP
標準包裝: 1,500
功能: 開關(guān)
電路: 3 x SPDT
導(dǎo)通狀態(tài)電阻: 170 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 9 V ~ 40 V,± 9 V ~ 22 V
電流 - 電源: 80µA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-WQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP-WQ(4x4)
包裝: 帶卷 (TR)
Data Sheet
ADG5233/ADG5234
Rev. B | Page 11 of 24
Figure 5. ADG5234 TSSOP Pin Configuration
Figure 6. ADG5234 LFCSP_WQ Pin Configuration
Table 10. ADG5234 Pin Function Descriptions
Pin No.
Mnemonic
Description
TSSOP
LFCSP_WQ
1
19
IN1
Logic Control Input 1.
2
20
S1A
Source Terminal 1A. This pin can be an input or an output.
3
1
D1
Drain Terminal 1. This pin can be an input or an output.
4
2
S1B
Source Terminal 1B. This pin can be an input or an output.
5
3
VSS
Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to
ground.
6
4
GND
Ground (0 V) Reference.
7
5
S2B
Source Terminal 2B. This pin can be an input or an output.
8
6
D2
Drain Terminal 2. This pin can be an input or an output.
9
7
S2A
Source Terminal 2A. This pin can be an input or an output.
10
8
IN2
Logic Control Input 2.
11
9
IN3
Logic Control Input 3.
12
10
S3A
Source Terminal 3A. This pin can be an input or an output.
13
11
D3
Drain Terminal 3. This pin can be an input or an output.
14
12
S3B
Source Terminal 3B. This pin can be an input or an output.
15
N/A
NC
No Connect. This pin is open.
16
13
VDD
Most Positive Power Supply Potential.
17
14
S4B
Source Terminal 4B. This pin can be an input or an output.
18
15
D4
Drain Terminal 4. This pin can be an input or an output.
19
16
S4A
Source Terminal 4A. This pin can be an input or an output.
20
17
IN4
Logic Control Input 4.
N/A
18
EN
Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx
logic inputs determine the on switches.
N/A
21
EP
Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints
and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
INx
SxA
SxB
0
Off
On
1
On
Off
IN1
1
S1A
2
D1
3
S1B
4
IN4
20
S4A
19
D4
18
S4B
17
VSS 5
VDD
16
GND
6
NC
15
S2B
7
S3B
14
D2
8
D3
13
S2A
9
S3A
12
IN2 10
IN3
11
ADG5234
TOP VIEW
(Not to Scale)
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
09
91
9-
0
05
NOTES
1. EXPOSED PAD TIED TO SUBSTRATE, VSS.
09
919-
102
14
13
12
1
3
4
S4B
15 D4
VDD
S3B
11 D3
D1
VSS
2
S1B
GND
5
S2B
7
S
2
A
6
D
2
8
IN
2
9
IN
3
1
0
S
3
A
1
9
IN
1
2
0
S
1
A
1
8
E
N
1
7
IN
4
1
6
S
4
A
ADG5234
TOP VIEW
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