參數(shù)資料
型號: ADG3246BCP
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: 2.5 V/3.3 V, 10-Bit, 2-Port Level Translating, Bus Switch
中文描述: 10-BIT DRIVER, TRUE OUTPUT, QCC24
封裝: 4 X 4 MM, MO-220-VGGD-2, CSP-24
文件頁數(shù): 8/12頁
文件大?。?/td> 353K
代理商: ADG3246BCP
PRELIMINARY TECHNICAL DATA
REV. Pr
C
–8–
ADG3246
For the following load circuit and waveforms, the notation that
is used is
V
IN
and
V
OUT
where:
V
or
V
V andV
V
V andV
V
IN
OUT
B
IN
OUT
A
=
=
=
=
CONTROL
INPUT
BE
0V
t
PHL
V
OUT
V
T
V
IH
V
H
V
T
V
L
t
PLH
Figure 2. Propagation Delay
V
CC
V
IN
V
OUT
C
L
R
L
R
L
SW1
GND
2 V
CC
R
T
D.U.T.
PULSE
GENERATOR
NOTES
PULSE GENERATOR FOR ALL PULSES:
t
R
2.5ns,
t
F
2.5ns,
FREQUENCY 10MHz
C
L
INCLUDES BOARD, STRAY, AND LOAD CAPACITANCES
R
IS THE TERMINATION RESISTOR, SHOULD BE EQUAL TO Z
OUT
OF THE PULSE GENERATOR.
Figure 1. Load Circuit
Test Conditions
Symbol
V
CC
= 3.3 V
±
0.3 V (
SEL
= V
CC
)
500
300
50
1.5
V
CC
= 2.5 V
±
0.2 V (
SEL
= V
CC
)
500
150
30
0.9
V
CC
= 3.3 V
±
0.3 V (
SEL
= 0 V)
500
150
30
0.9
Unit
mV
pF
V
R
L
V
C
L
V
T
Figure 3. Enable and Disable Times
TIMING MEASUREMENT INFORMATION
Table III. Switch Position
TEST
S1
2
×
V
CC
GND
t
PLZ
, t
PZL
t
PHZ
, t
PZH
ENABLE
DISABLE
CONTROL INPUT
BE
V
IN
= 0V
V
IN
= V
CC
V
OUT
SW1 @ 2V
CC
V
OUT
SW1 @ GND
t
PLZ
t
PZH
t
PHZ
t
PZL
V
T
0V
V
CC
V
T
V
H
V
H
–V
0V
V
L
V
L
+
V
V
CC
0V
V
T
V
INH
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