參數(shù)資料
型號(hào): ADG3123BRUZ
廠商: Analog Devices Inc
文件頁數(shù): 3/12頁
文件大?。?/td> 0K
描述: IC XLATOR 8CH LOG-HV 20-TSSOP
標(biāo)準(zhǔn)包裝: 75
邏輯功能: 變換器
位數(shù): 8
輸入類型: CMOS
輸出類型: 電壓
通道數(shù): 8
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 125ns
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 802 (CN2011-ZH PDF)
Data Sheet
ADG3123
Rev. B | Page 11 of 12
APPLICATIONS INFORMATION
The high voltage operation coupled with high current driving
capability and the wide range of CMOS levels accepted by the
ADG3123, make the device ideal for LCD-TFT panel applications.
In this type of application, the controllers that generate the
timing signals required to control the pixel scanning process
inside the panel are usually low voltage CMOS devices.
Most LCD-TFT panels operate at high supply voltages; therefore,
the timing signals generated by the controller require level
translation to drive the panel. Figure 18 shows a typical application
circuit where the ADG3123 translates eight timing signals provided
by the timing controller into high voltage logic levels required
to drive the panel.
05655-
016
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Y1
Y2
Y3
Y6
Y5
Y4
VDDB
Y8
Y7
VDDA
A1
A2
A3
A6
A5
A4
GND
VSS
A8
A7
ADG3123
LCD-TFT
PANEL
OUT1
OUT2
OUT3
OUT6
OUT5
OUT4
GND
OUT8
OUT7
TIMING
CONTROLLER
VDD
10F
0.1F
VDD = +2.3V TO +5.5V
DC TO DC
CONVERTER
–5V TO –10V
+25V TO +30V
+
10F
+
0.1F
NOTE: |VDDB| + |VSS| ≤ 35V and VDDA ≤ VDDB
Figure 18. Typical Application Circuit
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