The VCO shows variation of KV as the V
參數(shù)資料
型號: ADF4350BCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 5/32頁
文件大?。?/td> 0K
描述: IC SYNTH PLL VCO FN/IN 32LFCSP
產(chǎn)品變化通告: ADF4350, ADF4905/6 N-counter Change 05/Mar/2012
設計資源: Broadband Low EVM Direct Conversion Transmitter (CN0134)
Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144)
Using low noise linear drop-out regulators to power wideband PLL & VCO IC's (CN0147)
標準包裝: 5,000
類型: 扇出配送,分數(shù)-N,整數(shù)-N,時鐘/頻率合成器(RF)
PLL:
輸入: CMOS,TTL
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:3
差分 - 輸入:輸出: 無/無
頻率 - 最大: 4.4GHz
除法器/乘法器: 是/是
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應商設備封裝: 32-LFCSP-VQ(5x5)
包裝: 帶卷 (TR)
ADF4350
Rev. A | Page 13 of 32
OUTPUT STAGE
The VCO shows variation of KV as the VTUNE varies within the
band and from band-to-band. It has been shown for wideband
applications covering a wide frequency range (and changing
output dividers) that a value of 33 MHz/V provides the most
accurate KV as this is closest to an average value. Figure 21
shows how KV varies with fundamental VCO frequency along
with an average value for the frequency band. Users may prefer
this figure when using narrowband designs.
The RFOUTA+ and RFOUTA pins of the ADF4350 are connected
to the collectors of an NPN differential pair driven by buffered
outputs of the VCO, as shown in Figure 22. To allow the user to
optimize the power dissipation vs. the output power requirements,
the tail current of the differential pair is programmable by
Bits [D2:D1] in Register 4 (R4). Four current levels may be set.
These levels give output power levels of 4 dBm, 1 dBm, +2
dBm, and +5 dBm, respectively, using a 50 Ω resistor to AVDD
and ac coupling into a 50 Ω load. Alternatively, both outputs
can be combined in a 1 + 1:1 transformer or a 180° microstrip
coupler (see the Output Matching section). If the outputs are
used individually, the optimum output stage consists of a shunt
inductor to VVCO. The unused complementary output must
be terminated with a similar circuit to the used output.
80
70
60
50
40
30
20
10
0
2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6
07
325
-13
3
VC
O
SEN
SI
T
IVI
T
Y
(M
H
z/
V
)
FREQUENCY (GHz)
An auxiliary output stage exists on Pins RFOUTB+ and RFOUTB
providing a second set of differential outputs which can be
used to drive another circuit, or which can be powered down
if unused. The auxiliary output must be used in conjunction
with the main RF output. It cannot be used with the main
output powered down.
Another feature of the ADF4350 is that the supply current to
the RF output stage can be shut down until the part achieves
lock as measured by the digital lock detect circuitry. This is
enabled by the mute till lock detect (MTLD) bit in Register 4 (R4).
Figure 21. KV vs. Frequency
In fixed frequency applications, the ADF4350 VTUNE may
vary with ambient temperature switching from hot to cold.
In extreme cases, the drift causes VTUNE to drop to a very low
level (<0.25 V) and can cause loss of lock. This becomes an
issue only at fundamental VCO frequencies less than 2.95 GHz
and at ambient temperatures below 0°C.
VCO
RFOUTA+
RFOUTA–
BUFFER/
DIVIDE-BY-
1/2/4/8/16
07
32
5-
0
1
0
In cases such as these, if the ambient temperature decreases
below 0°C, the frequency needs to be reprogrammed (R0 updated)
to avoid VTUNE dropping to a level close to 0 V. Reprogramming
the part chooses a more suitable VCO band, and thus avoids
the low VTUNE issue. Any further temperature drops of more
than 20°C (below 0°C) also require further reprogramming.
Any increases in the ambient temperature do not require repro-
gramming.
Figure 22. Output Stage
相關(guān)PDF資料
PDF描述
ADF4351BCPZ IC SYNTH PLL VCO 32LFCSP
ADF4360-0BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
ADF4360-1BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
ADF4360-2BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
ADF4360-3BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADF4350BCPZ-RL7 功能描述:IC SYNTH PLL VCO FN/IN 32LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP(0.175",4.40mm 寬) 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR
ADF4350BCPZ-U6 制造商:Analog Devices 功能描述:
ADF4350EB1Z 制造商:Analog Devices 功能描述:AD EVAL BOARD - Bulk
ADF4351 制造商:AD 制造商全稱:Analog Devices 功能描述:Wideband Synthesizer
ADF4351BCPZ 功能描述:IC SYNTH PLL VCO 32LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)