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參數(shù)資料
| 型號： | ADF4206 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | Dual RF PLL Frequency Synthesizers |
| 中文描述： | 雙射頻鎖相環(huán)頻率合成器 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大小： | 206K |
| 代理商： | ADF4206 |
REV. 0
ADF4206/ADF4207/ADF4208
–14–
Table V. RF1 Reference Counter Latch Map
DB20 DB19 DB18 DB17 DB16 DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (1)
C1 (0)
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
P9
P13
CONTROL
BITS
14-BIT REFERENCE COUNTER, R
DB21
R
P
T
C
R
R
L
R
O
RF1 REFERENCE COUNTER LATCH
P10
P11
R14
0
0
0
0
.
.
.
1
R13
0
0
0
0
.
.
.
1
R12
0
0
0
0
.
.
.
1
..........
..........
..........
..........
..........
..........
..........
..........
..........
R3
0
0
0
1
.
.
.
1
R2
0
1
1
0
.
.
.
0
R1
1
0
1
0
.
.
.
0
DIVIDE RATIO
1
2
3
4
.
.
.
16380
1
1
1
..........
1
0
1
16381
1
1
1
..........
1
1
0
16382
1
1
1
..........
1
1
1
16383
P9
0
1
PD POLARITY
NEGATIVE
POSITIVE
P13
0
1
I
CP
1.25 mA
4.375 mA
P4
FROM RF2 R LATCH
0
0
1
1
0
0
0
0
1
P3
P12
0
0
0
0
0
0
1
1
1
P11
0
0
X
X
1
1
X
X
0
MUXOUT
LOGIC LOW STATE
RF2 ANALOG LOCK DETECT
RF2 REFERENCE DIVIDER OUTPUT
RF2 N DIVIDER OUTPUT
RF1 ANALOG LOCK DETECT
RF1/RF2 ANALOG LOCK DETECT
RF1 REFERENCE DIVIDER
RF1 N DIVIDER
FAST LOCK OUTPUT SWITCH ON
AND CONNECTED TO MUXOUT
RF2 COUNTER RESET
RF1 COUNTER RESET
RF2 AND RF1 COUNTER RESET
0
1
1
0
1
0
1
0
1
1
1
0
1
1
1
1
1
1
0
1
P12
R
G
P10
0
1
CHARGE PUMP OUTPUT
NORMAL
THREE-STATE
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| ADF4206BRU | Dual RF PLL Frequency Synthesizers |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4206BRU | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP |
| ADF4206BRU-REEL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP T/R |
| ADF4206BRU-REEL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP T/R |
| ADF4206BRUZ | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP |
| ADF4206BRUZ-R7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP T/R |
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