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參數(shù)資料
| 型號(hào)： | ADF4206 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | Dual RF PLL Frequency Synthesizers |
| 中文描述： | 雙射頻鎖相環(huán)頻率合成器 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 206K |
| 代理商： | ADF4206 |
REV. 0
ADF4206/ADF4207/ADF4208
–13–
Table IV. RF2 AB Counter Latch Map
B11
0
0
0
0
.
.
.
1
B10
0
0
0
0
.
.
.
1
B9
0
0
0
0
.
.
.
1
B3
0
0
0
0
.
.
.
1
B2
0
0
1
1
.
.
.
0
B1
0
1
0
1
.
.
.
0
B COUNTER DIVIDE RATIO
NOT ALLOWED
NOT ALLOWED
NOT ALLOWED
3
.
.
.
2044
..........
..........
..........
..........
..........
..........
..........
..........
1
1
1
..........
1
0
1
2045
1
1
1
..........
1
1
0
2046
1
1
1
..........
1
1
1
2047
A COUNTER
DIVIDE RATIO
0
1
2
3
A6
X
X
X
X
.
.
.
X
X
A5
X
X
X
X
.
.
.
X
X
A4
0
0
0
0
.
.
.
1
1
A3
0
0
0
0
.
.
.
1
1
A2
0
0
1
1
.
.
.
1
1
A1
0
1
0
1
.
.
.
0
1
14
15
N = BP + A, P IS PRESCALER VALUE SET BY P6. B MUST BE GREATER
THAN OR EQUAL TO A. TO ENSURE CONTINUOUSLY ADJACENT VALUES
OF Nx F
REF
, N
MIN
IS (P
2
–
P).
P7
0
1
RF2 SECTION
NORMAL OPERATION
POWER-DOWN
DB20 DB19 DB18 DB17 DB16 DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (0)
C1 (1)
A1
A2
A3
A4
A5
A6
B11
P6
CONTROL
BITS
11-BIT B COUNTER
DB21
RF2 AB COUNTER LATCH
R
D
R
P
P7
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
6-BIT A COUNTER
P6
0
1
RF2 PRESCALER
64/65
32/33
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| ADF4206BRU | Dual RF PLL Frequency Synthesizers |
| ADF4212 | Dual RF/IF PLL Frequency Synthesizers |
| ADF4210 | Dual RF/IF PLL Frequency Synthesizers |
| ADF4210BCP | Dual RF/IF PLL Frequency Synthesizers |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4206BRU | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP |
| ADF4206BRU-REEL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP T/R |
| ADF4206BRU-REEL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP T/R |
| ADF4206BRUZ | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP |
| ADF4206BRUZ-R7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP T/R |
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