- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373982 > ADF4193BCPZ-RL7 (ANALOG DEVICES INC) Low Phase Noise, Fast Settling PLL Frequency Synthesizer PDF資料下載
參數(shù)資料
| 型號(hào)： | ADF4193BCPZ-RL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | Low Phase Noise, Fast Settling PLL Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 3500 MHz, QCC32 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-2, LFCSP-32 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大小： | 437K |
| 代理商： | ADF4193BCPZ-RL7 |
第1頁當(dāng)前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
ADF4193
TABLE OF CONTENTS
Features..............................................................................................1
Rev. B | Page 2 of 28
Applications.......................................................................................1
General Description.........................................................................1
Functional Block Diagram..............................................................1
Revision History...............................................................................2
Specifications.....................................................................................3
Timing Characteristics ................................................................4
Absolute Maximum Ratings............................................................5
ESD Caution..................................................................................5
Pin Configuration and Function Descriptions.............................6
Typical Performance Characteristics.............................................8
Theory of Operation......................................................................11
Reference Input Section.............................................................11
RF Input Stage.............................................................................11
Register Map....................................................................................14
FRAC/INT Register (R0)...........................................................15
MOD/R Register (R1)................................................................16
Phase Register (R2)....................................................................17
Function Register (R3).............................................................. 18
Charge Pump Register (R4)...................................................... 19
Power-Down Register (R5)....................................................... 20
Mux Register (R6)...................................................................... 21
Programming.................................................................................. 22
Worked Example........................................................................ 22
Spur Mechanisms....................................................................... 22
Power-Up Initialization............................................................. 23
Changing the Frequency of the PLL and the Phase Look-Up
Table............................................................................................. 23
Applications..................................................................................... 25
Local Oscillator for A GSM Base Station................................ 25
Interfacing................................................................................... 27
PCB Design Guidelines for Chip Scale Package .................... 27
Outline Dimensions....................................................................... 28
Ordering Guide .......................................................................... 28
REVISION HISTORY
6/06—Rev A. to Rev. B
Changes to Table 1............................................................................ 3
Changes to Figure 32......................................................................18
Changes to Power-Up Initialization Section...............................23
Changes to Timer Values for Tx Section and Timer Values for
Rx Section........................................................................................25
11/05—Rev 0. to Rev. A
Updated Format..................................................................Universal
Changes to Features Section............................................................ 1
Changes to Table 1............................................................................ 3
Changes to Reference Input Section............................................11
Changes to RF N Divider Section ................................................11
Changes to the Lock Detect Section............................................13
Changes to Figure 29......................................................................15
Changes to the 8-Bit INT Value Section ..................................... 15
Changes to Figure 33...................................................................... 19
Replaced Figure 35......................................................................... 21
Changes to the Σ-Δ and Lock Detect Modes Section................ 21
Changes to the Power-Up Initialization Section........................ 23
Changes to Table 8.......................................................................... 23
Changes to the Local Oscillator for a GSM
Base Station Section....................................................................... 25
Changes to the Timer Values for Rx Section.............................. 25
Changes to Figure 36...................................................................... 26
Updates to the Outline Dimensions ............................................ 28
Changes to the Ordering Guide ................................................... 28
4/05—Revision 0: Initial Version
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADF4207BRU | Dual RF PLL Frequency Synthesizers |
| ADF4208BRU | Dual RF PLL Frequency Synthesizers |
| ADF4206 | Dual RF PLL Frequency Synthesizers |
| ADF4206BRU | Dual RF PLL Frequency Synthesizers |
| ADF4212 | Dual RF/IF PLL Frequency Synthesizers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4193SP1BCPZ | 制造商:Analog Devices 功能描述: |
| ADF4193SP1BCPZ-RL7 | 制造商:Analog Devices 功能描述: |
| ADF4193SP2BCPZ-RL7 | 制造商:Analog Devices 功能描述: |
| ADF4193WCCPZ-RL7 | 功能描述:IC PLL FREQ SYNTHESIZER 32LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| ADF4196 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Phase Noise, Fast Settling, 6 GHz |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。