參數(shù)資料
型號: ADE7761AARSZ
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調理
英文描述: Energy Metering IC with On-Chip Fault and Missing Neutral Detection
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: LEAD FREE, M0-150AE, SSOP-20
文件頁數(shù): 4/24頁
文件大小: 367K
代理商: ADE7761AARSZ
ADE7761A
Parameter
LOGIC INPUTS
5
PGA, SCF, S1, and S0
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
LOGIC OUTPUTS
5
CF, REVP, and FAULT
Output High Voltage, V
OH
Output Low Voltage, V
OH
F1 and F2
Output High Voltage, V
OH
Output Low Voltage, V
OH
POWER SUPPLY
V
DD
V
DD
1
See plots in the Typical Performance Characteristics section.
2
See the Terminology section for explanation of specifications.
3
See the Fault Detection section for explanation of fault detection functionality.
4
See the Missing Neutral Detection section for explanation of missing neutral detection functionality.
5
Sample tested during initial release and after any redesign or process change that might affect this parameter.
Rev. 0 | Page 4 of 24
Value
2.4
0.8
±3
10
4
1
4
1
4.75
5.25
3
Unit
V, min
V, max
μA, max
pF, max
V, min
V, max
V, min
V, max
V, min
V, max
mA, max
Test Conditions/Comments
V
DD
= 5 V ± 5%
V
DD
= 5 V ± 5%
Typical 10 nA, V
IN
= 0 V to V
DD
V
DD
= 5 V ± 5%
V
DD
= 5 V ± 5%
V
DD
= 5 V ± 5%, I
SOURCE
= 10 mA
V
DD
= 5 V ± 5%, I
SINK
= 10 mA
For specified performance
5 V 5%
5 V + 5%
TIMING CHARACTERISTICS
V
DD
= 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, T
MIN
to T
MAX
= 40°C to +85°C. Sample tested during
initial release and after any redesign or process change that might affect this parameter. See Figure 2.
Table 2.
Parameter
Value
Unit
Test Conditions/Comments
t
11
120
ms
F1 and F2 Pulse Width (Logic High).
t
2
See Table 7
s
Output Pulse Period. See the Transfer Function section.
t
3
1/2 t
2
s
Time Between F1 Falling Edge and F2 Falling Edge.
t
41
90
ms
CF Pulse Width (Logic High).
t
5
See Table 8
s
CF Pulse Period. See the Transfer Function section.
t
6
CLKIN/4
s
Minimum Time Between F1 and F2 Pulse.
1
The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Transfer Function section.
t
1
t
6
t
3
t
4
t
2
t
5
F1
F2
CF
0
Figure 2. Timing Diagram for Frequency Outputs
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