參數(shù)資料
型號(hào): ADE7758ARW
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Poly Phase Multifunction Energy Metering IC with Per Phase Information
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封裝: MS-013-AD, SOIC-24
文件頁數(shù): 61/68頁
文件大?。?/td> 1584K
代理商: ADE7758ARW
ADE7758
Address
[A6:A0]
0x47
Rev. A | Page 61 of 68
Name
VARCFNUM
R/W
1
R/W
Length
16
Default
Value
0
Description
Reactive Power CF Scaling Numerator Register. The content of this register is
used in the numerator of the VARCF output scaling. Bits [15:13] indicate reverse
polarity reactive power measurement for Phase A, Phase B, and Phase C in order,
i.e., Bit 15 is Phase A, Bit 14 is Phase B, and so on.
Reactive Power CF Scaling Denominator Register. The content of this register is
used in the denominator of the VARCF output scaling.
Reserved.
0x48
VARCFDEN
R/W
12
0x3F
0x49 to
0x7D
0x7E
RESERVED
CHKSUM
R
8
Checksum Register. The content of this register represents the sum of all the
ones in the last register read from the SPI port.
Version of the Die.
0x7F
VERSION
R
8
1
R/W: Read/write capability of the register. R: Read-only register. R/W: Register that can be both read and written.
OPERATIONAL MODE REGISTER (0x13)
The general configuration of the ADE7758 is defined by writing to the OPMODE register. Table 14 summarizes the functionality of each
bit in the OPMODE register.
Table 14. OPMODE Register
Bit
Location
Mnemonic
Value
Description
0
DISHPF
0
The HPFs (high-pass filter) in all current channel inputs are disabled when this bit is set.
1
DISLPF
0
The LPFs (low-pass filter) in all current channel inputs are disabled when this bit is set.
2
DISCF
1
The frequency outputs APCF and VARCF are disabled when this bit is set.
3 to 5
DISMOD
0
By setting these bits, ADE7758’s ADCs can be turned off. In normal operation, these bits should be
left at Logic 0.
DISMOD[2:0]
0
0
0
1
0
0
Bit
Default
Description
Normal operation.
Redirect the voltage inputs to the signal paths for the current channels
and the current inputs to the signal paths for the voltage channels.
Switch off only the current channel ADCs.
Switch off current channel ADCs and redirect the current input signals
to the voltage channel signal paths.
Switch off only the voltage channel ADCs.
Switch off voltage channel ADCs and redirect the voltage input signals
to the current channel signal paths.
Put the ADE7758 in sleep mode.
Put the ADE7758 in power-down mode.
Software Chip Reset. A data transfer to the ADE7758 should not take place for at least 18 μs after a
software reset.
This should be left at 0.
0
1
0
0
1
1
0
1
1
1
0
0
6
SWRST
0
0
1
1
1
1
1
7
RESERVED
0
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