參數(shù)資料
型號(hào): ADE7754AR
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: ADE7754
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封裝: MS-013AD, SOIC-24
文件頁數(shù): 20/44頁
文件大?。?/td> 630K
代理商: ADE7754AR
REV. PrG 01/03
PRELIMINARY TECHNICAL DATA
ADE7754
20
Since LPF2 does not have an ideal “brick wall” frequency
response—see Figure 21, the Active Power signal will have
some ripple due to the instantaneous power signal. This
ripple is sinusoidal and has a frequency equal to twice the line
frequency. Since the ripple is sinusoidal in nature, it is
removed when the Active Power signal is integrated to
calculate the Energy – see
Energy Calculation
.
Frequency
1.0Hz
3.0Hz
10Hz
30Hz
-24
-20
-16
-12
-8
-4
0
d
8Hz
Figure 21
Frequency response of the LPF used to filter
Instantaneous Power in each phase
Figure 22 shows the signal processing in each phase for the
Active Power in the ADE7754.
Figure 23 shows the maximum code (Hexadecimal) output
range of the Active Power signal (after AWG). Note that the
output range changes depending on the contents of the Active
Power Gain and Watt Gain registers – see
Current channel
ADC
. The minimum output range is given when the Active
Power Gain and Watt Gain registers contents are equal to
800h and the maximum range is given by writing 7FFh to the
Active Power Gain and Watt Gain registers. These can be
used to calibrate the Active Power (or Energy) calculation in
the ADE7754 for each phase and also the Total Active
Energy -see
Total Active Power calculation
.
0000000h
972474h
D1B717h
68DB8Ch
+ 100% F5
+ 50% FS
AAPGAIN[11:0] or
AWGAIN[11:0]
- 100% FS
- 150% FS
2E48E9h
EC56D5Ch
+ 150% FS
- 50% FS
13A92A4h
000h
7FFh
800h
Active Power
Current channel ± 0.5V / GAIN1
Voltage channel ± 0.5V / GAIN2
Figure 23 – Active Power Calculation Output Range
Power Offset Calibration
The ADE7754 also incorporates an Active Offset register on
each phase (AAPOS, BAPOS and CAPOS). These are
signed 2’s complement 12-bit registers which can be used to
remove offsets in the active power calculations. An offset may
exist in the power calculation due to cross talk between
channels on the PCB or in the IC itself. The offset calibration
allows the contents of the Active Power register to be
maintained at zero when no power is being consumed.
1 LSBs in the Active Power Offset register is equivalent to 1
LSB in the 28-bit Energy bus displayed on Figure 22. Each
time power is added to the internal Active Energy register, the
content of the Active Power Offset register is added -
see Total
Active Power calculation
. Assuming the average value from
LPF2 is 8637BCh (8,796,092d) with full AC scale inputs on
current channel and voltage channel, then 1 LSB in the LPF2
output is equivalent to 0.011% of measurement error at -
60dB down of full scale -
see Calibration of a 3-phase meter
based on the ADE7754
.
1
-100% to + 100% FS
28F5h
HPF
24
LPF2
-100% to +100% FS
28F5C2h
Current Signal - i(t)
Voltage Signal - v(t)
Instantaneous Power Signal - p(t)
MULTIPLIER
Active Power
Signal - P
I
V
D70Bh
D70A3Eh
00h
00h
S
+
24232221
APOS[11:0]
sgn
20
AWG
12
28
D1B717h
sgn sgn sgn sgn210
1V / GAIN1
1V / GAIN2
Figure 22
Active Power Signal Processing
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