參數(shù)資料
型號: ADE7753ARSRL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: Active and Apparent Energy Metering IC with di/dt sensor interface
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: MO-150AE, SSOP-20
文件頁數(shù): 7/38頁
文件大?。?/td> 449K
代理商: ADE7753ARSRL
ADE7753
–7–
REV. PrF 10/02
PRELIMINARY TECHNICAL DATA
PIN CONFIGURAT ION
SSOP Packages
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
DGND
CS
CLKOUT
CLKIN
ZX
CF
ADE7753
TOP VIEW
(Not to Scale)
AGND
IRQ
RESET
DVDD
V1P
V1N
V2N
V2P
SAG
REF
IN/OUT
11
12
AVDD
DIN
DOUT
SCLK
Pin No.
MNE MONIC
DE SCRIPT ION
15
C L K IN
Master clock for ADCs and digital signal processing. An external clock can be pro-
vided at this logic input. Alternatively, a parallel resonant AT crystal can be connected
across CLK IN and CLK OUT to provide a clock source for the ADE7753. T he clock
frequency for specified operation is 3.579545MHz. Ceramic load capacitors of between
22pF and 33pF should be used with the gate oscillator circuit. Refer to crystal manu-
facturers data sheet for load capacitance requirements.
A crystal can be connected across this pin and CLK IN as described above to provide a
clock source for the ADE7753. T he CLK OUT pin can drive one CMOS load when
either an external clock is supplied at CLK IN or a crystal is being used.
Chip Select. Part of the four wire SPI Serial Interface. T his active low logic input al-
lows the ADE7753 to share the serial bus with several other devices. See
ADE7753 Serial
Interface
.
Serial Clock Input for the synchronous serial interface. All Serial data transfers are
synchronized to this clock—see
ADE7753 Serial Interface
. T he SCLK has a schmitt-trigger
input for use with a clock source which has a slow edge transition time, e.g., opto-
isolator outputs.
Data Output for the Serial Interface. Data is shifted out at this pin on the rising edge of
SCLK . T his logic output is normally in a high impedance state unless it is driving data
onto the serial data bus—see
ADE7753 Serial Interface
..
Data Input for the Serial Interface. Data is shifted in at this pin on the falling edge of
SCLK —see
ADE7753 Serial Interface
..
16
C L K OU T
17
CS
18
SC L K
19
D OU T
20
D IN
相關(guān)PDF資料
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