參數(shù)資料
型號(hào): ADE7169ASTF16-RL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述: ANALOG CIRCUIT, PQFP64
封裝: MS-026BCD, LQFP-64
文件頁數(shù): 21/140頁
文件大?。?/td> 1359K
代理商: ADE7169ASTF16-RL
Preliminary Technical Data
ADE7169F16
Pin No.
Rev. PrD | Page 21 of 140
Mnemonic
Description
51
EA
This pin is used as an input for emulation. When held high, this input enables the device to fetch code
from internal program memory locations.The ADE7169F16 does not support external code memory.
This pin should not be left floating.
Analog Inputs for Current Channel. These inputs are fully differential voltage inputs with a maximum
differential level of
±500
mV for specified operation. This channel also has an internal PGA.
This pin provides the ground reference for the analog circuitry
Analog Inputs for second Current Channel. This input is fully differential with a maximum differential
level of
±500
mVrefered to I
N
for specified operation. This channel also has an internal PGA.
Reset input, Active low
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of
1.2 V ± 8% and a typical temperature coefficient of 50 ppm/°C maximum
3.3V Power supply input from Battery. This pin is connected internally to V
DD
when the Battery is
selected as the power supply for the ADE7169F16.
This pin provides access to the on-chip 2.5V analog LDO. No external active circuitry should be
connected to this pin. This pin should be decoupled with a 10
μ
F capacitor in parallel with a ceramic
100nF capacitor.
3.3V Power supply input from regulator. This pin is connected internally to V
DD
when the regulator is
selected as the power supply for the ADE7169F16. This pin should be decoupled with a 10
μ
F capacitor
in parallel with a ceramic 100nF capacitor.
3.3V Power supply output from ADE7169F16. This pin provides the supply voltage for the LDOs and
internal cicuitry of the ADE7169F16. This pin should be decoupled with a 10
μ
F capacitor in parallel with
a ceramic 100nF capacitor.
This pin provides access to the on-chip 2.5V digital LDO. No external active circuitry should be
connected to this pin. This pin should be decoupled with a 10
μ
F capacitor in parallel with a ceramic
100nF capacitor.
This pin provides the ground reference for the digital circuitry
Analog input for dc voltage monitoring. The maximum input voltage on this pin is xxxmV with respect
to AGND. This pin is used to monitor the pre-regulated dc voltage.
52, 53
I
P,
I
N
54
55
AGND
I
PB
56
57
RESET
REF
IN/OUT
58
V
BAT
59
V
INTA
60
V
DD
61
V
SWOUT
62
V
INTD
63
64
DGND
V
DCIN
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