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參數(shù)資料
| 型號： | ADD8608A8A-75B |
| 廠商： | ADATA Technology Co., Ltd. |
| 英文描述： | Double Data Rate SDRAM |
| 中文描述： | 雙倍數(shù)據(jù)速率SDRAM |
| 文件頁數(shù)： | 4/9頁 |
| 文件大小： | 549K |
| 代理商： | ADD8608A8A-75B |
A-Data
ADD8608A8A
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
V
IN
, V
out
-0.5 ~ 3.6
V
Voltage on VDD supply relative to Vss
V
DD
, V
DDQ
-1.0 ~ 3.6
V
Storage temperature
T
STG
-55 ~ +150
℃
Power dissipation
P
D
1.5
W
Short circuit current
I
OUT
50
mA
Note :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATING are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC Operating Condition
Voltage referenced to Vss = 0V, T
A
= 0 to 70
℃
Parameter
Symbol
Min
Max
Unit
Note
Supply voltage
V
DD
2.3
2.7
V
Supply voltage
V
DDQ
2.3
2.7
1
Input logic high voltage
V
IH
V
REF
+0.15
V
DDQ
+0.3
V
Input logic low voltage
V
IL
-0.3
V
REF
-0.15
V
2
Differential Clock DC Input voltage
V
ICK
-0.3
V
DDQ
+0.3
V
Input Differential CLK&/CLK voltage
V
ID
0.7
V
DDQ
+0.6-
V
Input leakage current
I
IL
-5
5
uA
3
Output leakage current
I
OL
-5
5
uA
4
Reference Voltage
V
REF
0.49* V
DDQ
0.51* V
DDQ
V
Termination Voltage
V
TT
V
REF
-0.04
V
REF
+0.04
5
Note :
1. V
DDQ
must not exceed the level of V
DDQ
.
2.V
IL
(min)=-0.9V with a pulse width
≦
5ns .
3.Any input 0V
≦
V
IN
≦
3.6V, all other pins are not under test = 0V.
4.Dout is disabled, 0V
≦
V
OUT
≦
2.7V.
5. V
REF
is expected to be equal to 0.5* V
DDQ
of the transmitting device, and to track variations in the DC level of
the same. Peak to peak noise on V
REF
may not exceed
±
2% of the DC value.
Rev 2 April, 2002
4
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