參數(shù)資料
型號(hào): ADCMP551BRQZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 13/16頁(yè)
文件大?。?/td> 0K
描述: IC COMPARATOR PECL/LVPECL 16QSOP
標(biāo)準(zhǔn)包裝: 98
類型: 帶鎖銷
元件數(shù): 1
輸出類型: 補(bǔ)充型,差分,LVPECL,開路發(fā)射極,PECL
電壓 - 電源,單路/雙路(±): 3.14 V ~ 5.25 V
電壓 - 輸入偏移(最小值): 10mV @ 3.3V
電流 - 輸入偏壓(最小值): 28µA @ 3.3V
電流 - 輸出(標(biāo)準(zhǔn)): 55mA @ 3.3V
電流 - 靜態(tài)(最大值): 17mA
CMRR, PSRR(標(biāo)準(zhǔn)): 76dB CMRR,75dB PSRR
傳輸延遲(最大): 0.625ns
磁滯: ± 0.5mV
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
安裝類型: 表面貼裝
包裝: 管件
產(chǎn)品目錄頁(yè)面: 764 (CN2011-ZH PDF)
配用: EVAL-ADCMP551BRQZ-ND - BOARD EVALUATION ADCMP551BRQZ
ADCMP551/ADCMP552/ADCMP553
Data Sheet
Rev. A | Page 6 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 2. ADCMP551 16-Lead QSOP
Pin Configuration
Figure 3. ADCMP552 20-Lead QSOP
Pin Configuration
Figure 4. ADCMP553 8-Lead MSOP
Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Function
ADCMP551
ADCMP552
ADCMP553
3, 14
1, 4, 17, 20
VCCO
Logic Supply Terminal.
1
2
6
QA
One of Two Complementary Outputs for Channel A. QA is logic high if the
analog voltage at the noninverting input is greater than the analog voltage at
the inverting input (provided the comparator is in the compare mode). See the
description of Pin LEA for more information.
2
3
5
QA
One of Two Complementary Outputs for Channel A. QA is logic low if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEA for more information.
4
5
2
LEA
One of Two Complementary Outputs for Channel A Latch Enable. In the
compare mode (logic high), the output tracks changes at the input of the
comparator. In the latch mode (logic low), the output reflects the input state just
prior to the comparator’s being placed in the latch mode. LEA must be driven in
conjunction with LEA.
5
6
1
LEA
One of Two Complementary Outputs for Channel A Latch Enable. In the
compare mode (logic high), the output tracks changes at the input of the
comparator. In the latch mode (logic low), the output reflects the input state just
prior to the comparator’s being placed in the latch mode. LEA must be driven in
conjunction with LEA.
6
7
VCCI
Input Supply Terminal.
7
8
4
INA
Inverting Analog Input of the Differential Input Stage for Channel A. The
inverting A input must be driven in conjunction with the noninverting A input.
8
9
3
+INA
Noninverting Analog Input of the Differential Input Stage for Channel A. The
noninverting A input must be driven in conjunction with the inverting A input.
10
HYSA
Programmable Hysteresis.
11
HYSB
Programmable Hysteresis.
9
12
+INB
Noninverting Analog Input of the Differential Input Stage for Channel B. The
noninverting B input must be driven in conjunction with the inverting B input.
10
13
INB
Inverting Analog Input of the Differential Input Stage for Channel B. The
inverting B input must be driven in conjunction with the noninverting B input.
11
14
8
AGND
Analog Ground.
04722-002
ADCMP551
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
–INA
+INA
QA
VCCO
VCCI
LEA
–INB
+INB
QB
VCCO
AGND
LEB
04722-003
ADCMP552
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
–INA
QA
VCCO
VCCI
LEA
VCCO
+INA
HYSA
–INB
QB
VCCO
AGND
LEB
VCCO
+INB
HYSB
04722-004
ADCMP553
TOP VIEW
(Not to Scale)
1
2
3
4
8
7
6
5
LEA
+INA
–INA
AGND
VCC
QA
相關(guān)PDF資料
PDF描述
LTC486CSW#PBF IC DVR RS485 LOW PWR QUAD 16SOIC
VI-J4N-MY-S CONVERTER MOD DC/DC 18.5V 50W
B37987M1333K054 CAP CER 0.033UF 100V 10% RADIAL
ADCMP564BRQZ IC COMPARATOR ECL DUAL HS 20QSOP
LTC487CSW#PBF IC DVR RS485 LOW PWR QUAD 16SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADCMP551BRQZ-REEL7 功能描述:IC COMPARATOR PECL/LVPECL 16QSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS,推挽式,滿擺幅,TTL 電壓 - 電源,單路/雙路(±):2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V 電壓 - 輸入偏移(最小值):5mV @ 5.5V 電流 - 輸入偏壓(最小值):1pA @ 5.5V 電流 - 輸出(標(biāo)準(zhǔn)):- 電流 - 靜態(tài)(最大值):24µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA,CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
ADCMP552 制造商:AD 制造商全稱:Analog Devices 功能描述:Single Supply High Speed PECL Comparators
ADCMP552BRQ 功能描述:IC COMPARATOR PECL/LVPECL 20QSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS,推挽式,滿擺幅,TTL 電壓 - 電源,單路/雙路(±):2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V 電壓 - 輸入偏移(最小值):5mV @ 5.5V 電流 - 輸入偏壓(最小值):1pA @ 5.5V 電流 - 輸出(標(biāo)準(zhǔn)):- 電流 - 靜態(tài)(最大值):24µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA,CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
ADCMP552BRQZ 功能描述:IC COMPARATOR PECL/LVPECL 20QSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:開路漏極 電壓 - 電源,單路/雙路(±):2.5 V ~ 11 V,±1.25 V ~ 5.5 V 電壓 - 輸入偏移(最小值):10mV @ 5V 電流 - 輸入偏壓(最小值):- 電流 - 輸出(標(biāo)準(zhǔn)):0.015mA @ 5V 電流 - 靜態(tài)(最大值):8.5µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):- 磁滯:- 工作溫度:0°C ~ 70°C 封裝/外殼:16-SOIC(0.154",3.90mm 寬) 安裝類型:表面貼裝 包裝:管件 產(chǎn)品目錄頁(yè)面:1386 (CN2011-ZH PDF)
ADCMP553 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Supply, High Speed PECL/LVPECL Comparators