參數(shù)資料
型號： ADC1613D125HN
廠商： NXP Semiconductors N.V.
元件分類： 外設(shè)及接口
英文描述： ADC1613D125 - Dual 16 bits ADC; 125 Msps; serial JESD204A
封裝： ADC1613D125HN/C1<SOT684-7 (HVQFN56)|<<http://www.nxp.com/packages/SOT684-7.html<1<Always Pb-free,;ADC1613D125HN/C1<SOT684-7 (HVQFN56)|<<http://www.nxp.com/packages/SOT684
文件頁數(shù)： 35/43頁
文件大?。?/td> 611K
代理商： ADC1613D125HN
ADC1613D_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 9 February 2011
35 of 43
NXP Semiconductors
ADC1613D series
Dual 16-bit ADC: serial JESD204A interface
Table 47.
Default values are highlighted.
Bit
Symbol
7 to 5
-
4 to 0
LID[4:0]
Cfg02_2_LID (address 082Dh)
Access
-
R/W
Value
000
11100
Description
not used
defines lane 1 identification number
Table 48.
Default values are highlighted.
Bit
Symbol
7 to 0
FCHK[7:0]
Cfg01_13_FCHK (address 084Ch)
Access
R
Value
00000000 defines the checksum value for lane 0
checksum corresponds to the sum of all the link configuration
parameters module 256 (as defined in JEDEC Standard
No.204A)
Description
Table 49.
Default values are highlighted.
Bit
Symbol
7 to 0
FCHK[7:0]
Cfg02_13_FCHK (address 084Dh)
Access
R
Value
00000000 defines the checksum value for lane 1
checksum corresponds to the sum of all the link configuration
parameters module 256 (as defined in JEDEC Standard
No.204A)
Description
Table 50.
Default values are highlighted.
Bit
Symbol
7
-
6
SCR_IN_MODE
Lane0_0_Ctrl (address 0870h)
Access
-
R/W
Value
0
Description
not used
defines the input type for scrambler and 8-bit/10-bit units:
(normal mode) = input of the scrambler and 8-bit/10-bit
units is the output of the frame assembly unit.
input of the scrambler and 8-bit/10-bit units is the PRBS
generator (PRBS type is defined with “PRBS_TYPE”
(Ser_PRBS_ctrl register)
defines output type of lane output unit:
normal mode: lane output is the 8-bit/10-bit output unit
constant mode: lane output is set to a constant (0
×
0)
toggle mode: lane output is toggling between 0
×
0 and 0
×
1
PRBS mode: lane output is the PRSB generator (PRBS type is
defined with “PRBS_TYPE” (Ser_PRBS_Ctrl register)
not used
defines lane polarity:
lane polarity is normal
lane polarity is inverted
defines lane clock polarity:
lane clock provided to the serializer is active on positive
edge
lane clock provided to the serializer is active on negative edge
0
(reset)
1
5 to 4
LANE_MODE[1:0]
R/W
00
(reset)
01
10
11
3
2
-
LANE_POL
-
R/W
0
0
1
1
LANE_CLK_POS_EDGE
R/W
0
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADC1613D125HN/C1,5 功能描述:模數(shù)轉(zhuǎn)換器 - ADC DUAL 16b ADC 125MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1613D125HN/C1,551 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 16BtADC 125Msps Serial JESD204A RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1613D125HN-C1 制造商:Integrated Device Technology Inc 功能描述:HVQFN56 - Bulk
ADC1613D125HN-C18 制造商:Integrated Device Technology Inc 功能描述:HVQFN56 - Tape and Reel
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