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參數(shù)資料
| 型號： | ADC1613D125HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | ADC1613D125 - Dual 16 bits ADC; 125 Msps; serial JESD204A |
| 封裝： | ADC1613D125HN/C1<SOT684-7 (HVQFN56)|<<http://www.nxp.com/packages/SOT684-7.html<1<Always Pb-free,;ADC1613D125HN/C1<SOT684-7 (HVQFN56)|<<http://www.nxp.com/packages/SOT684 |
| 文件頁數(shù)： | 24/43頁 |
| 文件大?。?/td> | 611K |
| 代理商： | ADC1613D125HN |
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ADC1613D_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 9 February 2011
24 of 43
NXP Semiconductors
ADC1613D series
Dual 16-bit ADC: serial JESD204A interface
11.6 Serial Peripheral Interface (SPI)
11.6.1
Register description
The ADC1613D serial interface is a synchronous serial communications port allowing for
easy interfacing with many industry microprocessors. It provides access to the registers
that control the operation of the chip in both read and write modes.
This interface is configured as a 3-wire type (SDIO as bidirectional pin).
Pin SCLK acts as the serial clock, and pin CS acts as the serial chip select.
Each read/write operation is sequenced by the CS signal and enabled by a LOW level to
to drive the chip with 2 bytes to 5 bytes, depending on the content of the instruction byte
(see
Table 14
).
Table 14.
[1]
R/W indicates whether a read (logic 1) or write (logic 0) transfer occurs after the instruction byte
Table 15.
R/W
[1]
0
1
[1]
Bits W1 and W0 indicate the number of bytes transferred after the instruction byte.
Table 16.
W1
0
0
1
1
Bits A12 to A0 indicate the address of the register being accessed. In the case of a
multiple byte transfer, this address is the first register to be accessed. An address counter
is incremented to access subsequent addresses.
+
0.999
90845
+
0.999
93896
+
0.999
96948
+
1
>
+
1
11
11
1111 1111 110
0
11
11
1111 1111 11
01
1
11
1 1111 1111 1110
11
11
1111 1111 1111
11
11
1111 1111 1111
0
1
11
1111 1111 110
0
0
1
11
1111 1111 11
01
0
1
11
1111 1111 1110
0
1
11
1111 1111 1111
0
1
11
1111 1111 1111
0
0
0
0
1
Table 13.
INP
INM (V)
Output codes versus input voltage
…continued
Offset binary
Two’s complement
OTR
SPI instruction bytes
MSB
7
R/W
[1]
A7
LSB
0
A8
A0
Bit
Description
6
W1
A6
5
W0
A5
4
A12
A4
3
A11
A3
2
A10
A2
1
A9
A1
Read or Write mode access description
Description
Write mode operation
Read mode operation
Number of bytes to be transferred
W0
0
1
0
1
Number of bytes transferred
1 byte
2 bytes
3 bytes
4 or more bytes
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| ADC1613S105HN | Single 16 bits ADC; 105 Msps; serial JESD204A |
| ADC1613S125HN | Single 16 bits ADC; 125 Msps; serial JESD204A |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1613D125HN/C1,5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC DUAL 16b ADC 125MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1613D125HN/C1,551 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 16BtADC 125Msps Serial JESD204A RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1613D125HN-C1 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN56 - Bulk |
| ADC1613D125HN-C18 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN56 - Tape and Reel |
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