參數(shù)資料
型號: ADC1410S065HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Single 14-bit ADC 65 Msps CMOS or LVDS DDR digital outputs
封裝: ADC1410S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-1.html<1<Always Pb-free,;ADC1410S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618
文件頁數(shù): 22/40頁
文件大小: 551K
代理商: ADC1410S065HN
ADC1410S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 24 December 2010
22 of 40
NXP Semiconductors
ADC1410S series
Single 14-bit ADC; CMOS or LVDS DDR digital output
11.3.3
Common-mode output voltage (V
O(cm)
)
A 0.1
μ
F filter capacitor should be connected between pin VCM and ground to ensure a
low-noise common-mode output voltage. When AC-coupled, pin VCM can then be used to
set the common-mode reference for the analog inputs, for instance via a transformer
middle point.
11.3.4
Biasing
The common-mode input voltage (V
I(cm)
) on pins INP and INM should be set externally to
0.5V
DDA
for optimal performance and should always be between 1.1 V and 2.5 V (see
Table 6
).
11.4 Clock input
11.4.1
Drive modes
The ADC1410S can be driven differentially (LVPECL). It can also be driven by a
single-ended Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS) signal
connected to pin CLKP (pin CLKM should be connected to ground via a capacitor) or pin
CLKM (pin CLKP should be connected to ground via a capacitor).
Fig 29. Equivalent schematic of the common-mode reference circuit
1.5 V
VCM
0.1
μ
F
package
ESD
parasitics
005aaa051
COMMON-MODE
REFERENCE
ADC core
a. Rising edge LVCMOS
b. Falling edge LVCMOS
Fig 30. LVCMOS single-ended clock input
LVCMOS
clock input
CLKP
CLKM
005aaa174
005aaa053
LVCMOS
clock input
CLKP
CLKM
相關(guān)PDF資料
PDF描述
ADC1410S065HN Single 14-bit ADC 65 Msps CMOS or LVDS DDR digital outputs
ADC1410S080HN Single 14-bit ADC 80 Msps CMOS or LVDS DDR digital outputs
ADC1410S105HN Single 14-bit ADC 105 Msps CMOS or LVDS DDR digital outputs
ADC1410S125HN Single 14-bit ADC 125 Msps CMOS or LVDS DDR digital outputs
ADC1412D065HN Dual 14-bit ADC 65 Msps CMOS or LVDS DDR digital outputs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADC1410S065HN,518 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SNGLE 14b ADC 65MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1410S065HN/C1,5 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SGL 14b ADC 65 MSPS CMOS OR LVDS DDR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1410S065HN-C1 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1410S065HN-C18 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32