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參數(shù)資料
| 型號： | ADC1113S125HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Single 11 bits ADC; 125Msps; serial JESD204A |
| 封裝： | ADC1113S125HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/SOT1152-1.html<1<Always Pb-free,;ADC1113S125HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/S |
| 文件頁數(shù)： | 25/38頁 |
| 文件大小： | 648K |
| 代理商： | ADC1113S125HN |
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ADC1113S125
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 15 March 2011
31 of 38
NXP Semiconductors
ADC1113S125
Single 11-bit ADC; serial JESD204A interface
Table 41.
Cfg_9_S (address 0828h)
Default values are highlighted.
Bit
Symbol
Access
Value
Description
7 to 1
-
0000000
not used
0S
R/W
0
defines number of samples per converter per frame cycle
Table 42.
Cfg_10_HD_CF (address 0829h)
Default values are highlighted.
Bit
Symbol
Access
Value
Description
7
HD
R/W
*
defines high density format
6 to 2
-
00000
not used
1 to 0
CF[1:0]
R/W
00
defines number of control words per frame clock cycle per link.
Table 43.
Cfg_02_2_LID (address 082Dh)
Default values are highlighted.
Bit
Symbol
Access
Value
Description
7 to 5
-
000
not used
4 to 0
LID[4:0]
R/W
11100
defines lane identification number
Table 44.
Cfg02_13_FCHK (address 084Dh)
Default values are highlighted.
Bit
Symbol
Access
Value
Description
7 to 0
FCHK[7:0]
R
********
defines the checksum value for lane
checksum corresponds to the sum of all the link configuration
parameters module 256 (as defined in JEDEC Standard
No.204A)
Table 45.
Lane_0_Ctrl (address 0871h)
Default values are highlighted.
Bit
Symbol
Access
Value
Description
7
-
0
not used
6
SCR_IN_MODE
R/W
defines the input type for scrambler and 8-bit/10-bit units
0 (reset)
(normal mode) = input of the scrambler and 8-bit/10-bit
units is the output of the frame assembly unit.
1
input of the scrambler and 8-bit/10-bit units is the PRBS
generator (PRBS type is defined with “PRBS_TYPE[1:0]”
(Ser_PRBS_Ctrl register)
5 to 4
LANE_MODE[1:0]
R/W
defines output type of lane output unit:
00 (reset)
normal mode: lane output is the 8-bit/10-bit output unit
01
constant mode: lane output is set to a constant (0
× 0)
10
toggle mode: lane output is toggling between 0
× 0 and 0 × 1
11
PRBS mode: lane output is the PRBS generator (PRBS type is
defined with “PRBS_TYPE[1:0]” (Ser_PRBS_Ctrl register)
3
-
0
not used
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ADC1113S125HN/C1,5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC SGL 11BT ADC 125MSPS SERIAL JESD204A RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1113S125HN/C1,551 | 制造商:NXP Semiconductors 功能描述:Bulk 制造商:NXP Semiconductors 功能描述:0 |
| ADC1113S125HN-C1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1113S125HN-C18 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN32 - Tape and Reel |
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