參數(shù)資料
型號(hào)： ADAV803ASTZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 44/60頁(yè)
文件大?。?/td> 0K
描述： IC CODEC AUDIO R-DVD 3.3V 64LQFP
標(biāo)準(zhǔn)包裝： 1,500
類型： 音頻編解碼器
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 2 / 2
三角積分調(diào)變： 無(wú)
動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 102 / 101
電壓 - 電源，模擬： 3 V ~ 3.6 V
電壓 - 電源，數(shù)字： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 帶卷 (TR)
配用： EVAL-ADAV803EBZ-ND - BOARD EVALUATION FOR ADAV803
ADAV803
Rev. A | Page 49 of 60
DAC Control Register 4—Address 1100111 (0x67)
Table 102. DAC Control Register 4 Bit Map
7
6
5
4
3
2
1
0
Reserved
INTRPT
ZEROSEL1
ZEROSEL0
Reserved
Table 103. DAC Control Register 4 Bit Descriptions
Bit Name
Description
INTRPT
This bit selects the functionality of the ZEROL/INT pin.
0 = Pin functions as a ZEROL flag pin.
1 = Pin functions as an interrupt pin.
ZEROSEL[1:0]
These bits control the functionality of the ZEROR pin when the ZEROL/INT pin is used as an interrupt.
00 = Pin functions as a ZEROR flag pin.
01 = Pin functions as a ZEROL flag pin.
10 = Pin is asserted when either the left or right channel is zero.
11 = Pin is asserted when both the left and right channels are zero.
DAC Left Volume—Address 1101000 (0x68)
Table 104. DAC Left Volume Register Bit Map
7
6
5
4
3
2
1
0
DVOLL7
DVOLL6
DVOLL5
DVOLL4
DVOLL3
DVOLL2
DVOLL1
DVOLL0
Table 105. DAC Left Volume Register Bit Descriptions
Bit Name
Description
DVOLL[7:0]
DAC left channel volume control.
1111111 = 0 dBFS.
1111110 = 0.375 dBFS.
0000000 = 95.625 dBFS.
DAC Right Volume—Address 1101001 (0x69)
Table 106. DAC Right Volume Register Bit Map
7
6
5
4
3
2
1
0
DVOLR7
DVOLR6
DVOLR5
DVOLR4
DVOLR3
DVOLR2
DVOLR1
DVOLR0
Table 107. DAC Right Volume Register Bit Descriptions
Bit Name
Description
DVOLR[7:0]
DAC right channel volume control.
1111111 = 0 dBFS.
1111110 = 0.375 dBFS.
0000000 = 95.625 dBFS.
DAC Left Peak Volume—Address 1101010 (0x6A)
Table 108. DAC Left Peak Volume Register Bit Map
7
6
5
4
3
2
1
0
Reserved
DLP5
DLP4
DLP3
DLP2
DLP1
DLP0
Table 109. DAC Left Peak Volume Register Bit Descriptions
Bit Name
Description
DLP[5:0]
DAC left channel peak volume detection.
000000 = 0 dBFS.
000001 = 1 dBFS.
111111 = 63 dBFS.
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