參數(shù)資料
型號： ADAV803ASTZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 39/60頁
文件大小： 0K
描述： IC CODEC AUDIO R-DVD 3.3V 64LQFP
標準包裝： 1,500
類型： 音頻編解碼器
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 2 / 2
三角積分調(diào)變： 無
動態(tài)范圍，標準 ADC / DAC (db)： 102 / 101
電壓 - 電源，模擬： 3 V ~ 3.6 V
電壓 - 電源，數(shù)字： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 帶卷 (TR)
配用： EVAL-ADAV803EBZ-ND - BOARD EVALUATION FOR ADAV803
ADAV803
Rev. A | Page 44 of 60
Mute and De-Emphasis—Address 0011110 (0x1E)
Table 73. Mute and De-Emphasis Register Bit Map
7
6
5
4
3
2
1
0
Reserved
TxMUTE
Reserved
SRC_DEEM1
SRC_DEEM0
Reserved
Table 74. Mute and De-Emphasis Register Bit Descriptions
Bit Name
Description
TxMUTE
Mutes the AES3/S/PDIF transmitter.
0 = Transmitter is not muted.
1 = Transmitter is muted.
SRC_DEEM[1:0]
Selects the de-emphasis filter for the input data to the sample rate converter.
00 = No de-emphasis.
01 = 32 kHz de-emphasis.
10 = 44.1 kHz de-emphasis.
11 = 48 kHz de-emphasis.
NonAudio Preamble Type—Address 0011111 (0x1F)
Table 75. NonAudio Preamble Type Register (Read-Only) Bit Map
7
6
5
4
3
2
1
0
Reserved
DTS-CD
Preamble
NonAudio
Frame
NonAudio
Subframe_A
NonAudio
Subframe_B
Table 76. NonAudio Preamble Type Register (Read-Only) Bit Descriptions
Bit Name
Description
DTS-CD Preamble
This bit is set if the DTS-CD preamble is detected.
NonAudio Frame
This bit is set if the data received through the AES3/S/PDIF receiver is nonaudio data according to the IEC61937
standard or nonaudio data according to SMPTE337M.
NonAudio Subframe_A
This bit is set if the data received through Channel A of the AES3/S/PDIF receiver is subframe nonaudio data
according to SMPTE337M.
NonAudio Subframe_B
This bit is set if the data received through Channel B of the AES3/S/PDIF receiver is subframe nonaudio data
according to SMPTE337M.
Receiver Channel Status Buffer—Address 0100000 to Address 0110111 (0x20 to 0x37)
Table 77. Receiver Channel Status Buffer Register Bit Map
7
6
5
4
3
2
1
0
RCSB7
RCSB6
RCSB5
RCSB4
RCSB3
RCSB2
RCSB1
RCSB0
Table 78. Receiver Channel Status Buffer Register Bit Descriptions
Bit Name
Description
RCSB[7:0]
The 24-byte receiver channel status buffer. The PRO bit is stored at address location 0x20, Bit 0. This buffer is read-
only if the channel status is not autobuffered between the receiver and transmitter.
Transmitter Channel Status Buffer—Address 0111000 to Address 1001111 (0x38 to 0x4F)
Table 79. Transmitter Channel Status Buffer Register Bit Map
7
6
5
4
3
2
1
0
TCSB7
TCSB6
TCSB5
TCSB4
TCSB3
TCSB2
TCSB1
TCSB0
Table 80. Transmitter Channel Status Buffer Register Bit Descriptions
Bit Name
Description
TCSB[7:0]
The 24-byte transmitter channel status buffer. The PRO bit is stored at address location 0x38, Bit 0. This buffer is
disabled when autobuffering between the receiver and transmitter is enabled.
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