參數(shù)資料
型號: ADA4938-2ACPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 16/28頁
文件大小: 0K
描述: IC ADC DRIVER DUAL DIFF 24LFCSP
標(biāo)準(zhǔn)包裝: 5,000
類型: ADC 驅(qū)動器
應(yīng)用: 數(shù)據(jù)采集
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 帶卷 (TR)
ADA4938-1/ADA4938-2
Rev. A | Page 23 of 28
LAYOUT, GROUNDING, AND BYPASSING
As a high speed device, the ADA4938-x is sensitive to the
PCB environment in which it operates. Realizing its superior
performance requires attention to the details of high speed
PCB design.
The first requirement is a solid ground plane that covers as much of
the board area around the ADA4938-x as possible. However, the
area near the feedback resistors (RF), input gain resistors (RG),
and the input summing nodes should be cleared of all ground
and power planes (see Figure 66). Clearing the ground and
power planes minimizes any stray capacitance at these nodes
and prevents peaking of the response of the amplifier at high
frequencies.
The thermal resistance, θJA, is specified for the device, including
the exposed pad, soldered to a high thermal conductivity 4-layer
circuit board, as described in EIA/JESD 51-7. The exposed pad
is electrically isolated from the device; therefore, it can be con-
nected to a ground plane using vias. Examples of the thermal
attach pad and via structure for the ADA4938-1 are shown in
06
59
2-
00
8
Figure 66. Ground and Power Plane Voiding in Vicinity of RF and RG
Bypass the power supply pins as close to the device as possible
and directly to a nearby ground plane. Use high frequency ceramic
chip capacitors. It is recommended that two parallel bypass capa-
citors (1000 pF and 0.1 μF) be used for each supply with the
1000 pF capacitor placed closer to the device; if further away,
provide low frequency bypassing using 10 μF tantalum capacitors
from each supply to ground.
Signal routing should be short and direct to avoid parasitic
effects. Wherever complementary signals exist, provide a
symmetrical layout to maximize balanced performance.
When routing differential signals over a long distance, keep
PCB traces close together and twist any differential wiring to
minimize loop area. Doing this reduces radiated energy and
makes the circuit less susceptible to interference.
06
59
2-
0
60
1.30
0.80
1.30
Figure 67. Recommended PCB Thermal Attach Pad (ADA4938-1)
(Dimensions in mm)
06
59
2-
06
1
0.30
PLATED
VIA HOLE
1.30
GROUND PLANE
POWER PLANE
BOTTOM METAL
TOP METAL
Figure 68. Cross-Section of a 4-Layer PCB (ADA4938-1) Showing a Thermal Via Connection to the Buried Ground Plane (Dimensions in mm)
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