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參數(shù)資料
| 型號(hào)： | ADA4938-1_07 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Ultra-Low Distortion Differential ADC Driver |
| 中文描述： | 超低失真差分ADC驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 307K |
| 代理商： | ADA4938-1_07 |
Preliminary Technical Data
ADA4938-1
Similar to the case of a conventional op amp, the output noise
voltage densities can be estimated by multiplying the input-
referred terms at +IN and IN by the appropriate output factor,
where:
2
is the circuit noise gain.
Rev. PrD | Page 11 of 14
(
)
2
1
R
N
β
β
G
+
=
G1
F1
G1
+
1
R
R
β
=
and
G2
F2
G2
+
2
R
R
R
β
=
are the feedback factors.
When R
F1
/R
G1
= R
F2
/R
G2
, then β1 = β2 = β, and the noise gain
becomes
R
β
G
F
N
R
G
+
=
=
1
1
Note that the output noise from V
OCM
goes to zero in this case.
The total differential output noise density, v
nOD
, is the root-sum-
square of the individual output noise terms.
∑
=
i
=
8
1
2
nOi
nOD
v
v
THE IMPACT OF MISMATCHES IN THE FEEDBACK
NETWORKS
As previously mentioned, even if the external feedback networks
(
R
F
/R
G
) are mismatched, the internal common-mode feedback
loop still forces the outputs to remain balanced. The amplitudes
of the signals at each output remain equal and 180° out of phase.
The input-to-output, differential mode gain varies proportionately
to the feedback mismatch, but the output balance is unaffected.
As well as causing a noise contribution from V
OCM
, ratio
matching errors in the external resistors result in a degradation
of the ability of the circuit to reject input common-mode signals,
much the same as for a four-resistor difference amplifier made
from a conventional op amp.
In addition, if the dc levels of the input and output common-
mode voltages are different, matching errors result in a small
differential-mode output offset voltage. When G = 1, with a
ground referenced input signal and the output common-mode
level set to 2.5 V, an output offset of as much as 25 mV (1% of
the difference in common-mode levels) can result if 1% tolerance
resistors are used. Resistors of 1% tolerance result in a worst-
case input CMRR of about 40 dB, a worst-case differential-
mode output offset of 25 mV due to 2.5 V level-shift, and no
significant degradation in output balance error.
CALCULATING THE INPUT IMPEDANCE OF AN
APPLICATION CIRCUIT
The effective input impedance of a circuit depends on whether
the amplifier is being driven by a single-ended or differential
signal source. For balanced differential input signals, as shown
in Figure 6, the input impedance (R
IN, dm
) between the inputs
(+D
IN
and D
IN
) is simply R
IN, dm
= 2 × R
G
.
Figure 6. ADA4938-1 Configured for Balanced (Differential) Inputs
For an unbalanced, single-ended input signal (see Figure 7), the
input impedance is
(
)
+
×
=
F
G
F
G
R
cm
IN
R
R
R
R
2
1
,
Figure 7. ADA4938-1 Configured for Unbalanced (Single-Ended) Input
The input impedance of the circuit is effectively higher than it
would be for a conventional op amp connected as an inverter
because a fraction of the differential output voltage appears at
the inputs as a common-mode signal, partially bootstrapping
the voltage across the input resistor R
G
.
INPUT COMMON-MODE VOLTAGE RANGE IN
SINGLE-SUPPLY APPLICATIONS
The ADA4938-1 is optimized for level-shifting, ground-referenced
input signals. As such, the center of the input common-mode
range is shifted approximately 1 V down from midsupply. For
5 V single-supply operation, the input common-mode range at
the summing nodes of the amplifier is 0.3 V to 3.0 V. To avoid
clipping at the outputs, the voltage swing at the +IN and –IN
terminals must be confined to these ranges.
SETTING THE OUTPUT COMMON-MODE VOLTAGE
The V
OCM
pin of the ADA4938-1 is internally biased at a voltage
approximately equal to the midsupply point (average value of
the voltages on V+ and V). Relying on this internal bias results
in an output common-mode voltage that is within about 100 mV of
the expected value.
In cases where more accurate control of the output common-
mode level is required, it is recommended that an external
source, or resistor divider (10 kΩ or greater resistors), be used.
It is also possible to connect the V
OCM
input to a common-mode
level (CML) output of an ADC. However, care must be taken to
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