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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� ADA4051-2ACPZ-R7
寤犲晢锛� Analog Devices Inc
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 5/20闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC OPAMP RRIO ZERO DRIFT 8LFCSP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 1,500
鏀惧ぇ鍣ㄩ鍨嬶細 闆舵紓绉�
闆昏矾鏁�(sh霉)锛� 2
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 0.06 V/µs
澧炵泭甯跺绌嶏細 125kHz
闆绘祦 - 杓稿叆鍋忓锛� 20pA
闆诲 - 杓稿叆鍋忕Щ锛� 2µV
闆绘祦 - 闆绘簮锛� 13µA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 15mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 1.8 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-VFDFN 瑁搁湶鐒婄洡锛孋SP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-LFCSP-VD锛�3x3锛�
鍖呰锛� 甯跺嵎 (TR)
ADA4051-1/ADA4051-2
TA = 25掳C, unless otherwise noted.
Rev. B | Page 13 of 20
IN
P
U
T
V
O
L
T
A
G
E
(
50
m
V/
D
IV)
O
U
T
P
UT
V
O
L
T
A
G
E
(
500m
V
/DI
V
)
TIME (40s/DIV)
VSY = 卤0.9V
G = 鈥�10
INPUT VOLTAGE
OUTPUT VOLTAGE
鈥�0.5
1.5
0.5
0
鈥�0.15
0.05
0
鈥�0.05
鈥�0.10
1.0
IN
PU
T
VO
L
T
A
G
E
(
10
0m
V/
D
IV)
鈥�0.3
鈥�0.4
0.1
0
鈥�0.1
鈥�0.2
鈥�1
3
4
1
0
2
08
05
6-
04
4
Figure 47. Negative Overload Recovery
IN
P
U
T
V
O
L
T
A
G
E
(
500mV
/DI
V
)
O
U
T
P
UT
V
O
L
T
AG
E
(
5mV
/D
IV
)
TIME (40s/DIV)
VSY = 卤0.9V
VIN = 1V p-p
RL = 10k
CL = 100pF
INPUT VOLTAGE
OUTPUT VOLTAGE
鈥�5
5
0
08
05
6-
04
5
ERROR
BAND
Figure 48. Positive Settling Time to 0.1%
IN
P
U
T
V
O
L
T
A
G
E
(
500m
V
/DI
V
)
O
U
T
P
UT
V
O
L
T
AG
E
(
5mV
/D
IV
)
TIME (40s/DIV)
INPUT VOLTAGE
OUTPUT VOLTAGE
VSY = 卤0.9V
VIN = 1V p-p
RL = 10k
CL = 100pF
08
05
6-
04
6
ERROR
BAND
鈥�5
5
0
Figure 49. Negative Settling Time to 0.1%
O
U
T
PU
T
VO
L
T
A
G
E
(
1V/
D
IV)
TIME (40s/DIV)
INPUT VOLTAGE
OUTPUT VOLTAGE
08
05
6-
04
7
VSY = 卤2.5V
G = 鈥�10
Figure 50. Negative Overload Recovery
INPUT VOLTAGE
IN
P
U
T
V
O
L
T
A
G
E
(
500mV
/DI
V
)
O
U
T
P
UT
V
O
L
T
AG
E
(
5mV
/D
IV
)
TIME (40s/DIV)
VSY = 卤2.5V
VIN = 1V p-p
RL = 10k
CL = 100pF
OUTPUT VOLTAGE
鈥�5
5
0
08
05
6-
04
8
ERROR
BAND
IN
P
U
T
V
O
L
T
A
G
E
(
50
0m
V/
D
IV)
OU
TP
U
T
V
O
LT
A
G
E
(
5m
V
/D
IV
)
鈥�5
5
0
Figure 51. Positive Settling Time to 0.1%
TIME (40s/DIV)
INPUT VOLTAGE
OUTPUT VOLTAGE
ERROR
BAND
VSY = 卤2.5V
VIN = 1V p-p
RL = 10k
CL = 100pF
08
05
6-
0
49
Figure 52. Negative Settling Time to 0.1%
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
R14-5 CONN RING TERM 6 AWG 10 STUD
0461120201 CONN RCPT VERT 2POS W/O GUIDES
LVK20R020DER RES .02 OHM 3/4W .5% 2010 SMD
7100.1115.13 FUSE 1A 250V T-LAG 19MM PCB
7100.1109.13 FUSE 250MA 250V T-LAG 19MM PCB
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ADA4051-2ACPZ-RL 鍔熻兘鎻忚堪:IC OPAMP RRIO ZERO DRIFT 8LFCSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:闆诲鍙嶉 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:33 V/µs 澧炵泭甯跺绌�:20MHz -3db甯跺:30MHz 闆绘祦 - 杓稿叆鍋忓:2nA 闆诲 - 杓稿叆鍋忕Щ:3000µV 闆绘祦 - 闆绘簮:2.5mA 闆绘祦 - 杓稿嚭 / 閫氶亾:30mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):4.5 V ~ 16.5 V锛�±2.25 V ~ 8.25 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-SOIC 鍖呰:甯跺嵎 (TR)
ADA4051-2ARMZ 鍔熻兘鎻忚堪:IC OPAMP RRIO ZERO DRIFT 8MSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Differential Circuit Design Techniques for Communication Applications 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:RF/IF 宸垎 闆昏矾鏁�(sh霉):1 杓稿嚭椤炲瀷:宸垎 杞�(zhu菐n)鎻涢€熺巼:9800 V/µs 澧炵泭甯跺绌�:- -3db甯跺:2.9GHz 闆绘祦 - 杓稿叆鍋忓:3µA 闆诲 - 杓稿叆鍋忕Щ:- 闆绘祦 - 闆绘簮:40mA 闆绘祦 - 杓稿嚭 / 閫氶亾:- 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:16-VQFN 瑁搁湶鐒婄洡锛孋SP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-LFCSP-VQ 鍖呰:鍓垏甯� (CT) 鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈�:551 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:ADL5561ACPZ-R7CT
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ADA4051-2ARMZ-RL 鍔熻兘鎻忚堪:IC OPAMP R-R CMOS 115KHZ 8MSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:闆诲鍙嶉 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:33 V/µs 澧炵泭甯跺绌�:20MHz -3db甯跺:30MHz 闆绘祦 - 杓稿叆鍋忓:2nA 闆诲 - 杓稿叆鍋忕Щ:3000µV 闆绘祦 - 闆绘簮:2.5mA 闆绘祦 - 杓稿嚭 / 閫氶亾:30mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):4.5 V ~ 16.5 V锛�±2.25 V ~ 8.25 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-SOIC 鍖呰:甯跺嵎 (TR)