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參數(shù)資料
| 型號(hào)： | AD9984AKSTZ-170 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 其它接口 |
| 英文描述： | High Performance 10-Bit Display Interface |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PQFP80 |
| 封裝： | ROHS COMPLIANT, MS-026BEC, LQFP-80 |
| 文件頁數(shù)： | 16/44頁 |
| 文件大?。?/td> | 490K |
| 代理商： | AD9984AKSTZ-170 |
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AD9984A
SYNC PROCESSING
The inputs of the sync processing section of the AD9984A are
combinations of digital Hsyncs and Vsyncs, analog sync-on-
green or sync-on-Y signals, and an optional external coast
signal. From these signals, the part generates a precise, jitter-
free clock from its PLL, an odd/even-field signal, HSOUT and
VSOUT signals, a count of Hsyncs per Vsync, and a
programmable SOGOUT. The main sync processing blocks are
the sync slicer, sync separator, Hsync filter, Hsync regenerator,
Vsync filter, and coast generator.
The sync slicer extracts the sync signal from the green
graphics or luminance video signal that is connected to
the SOGINx inputs, and outputs a digital composite sync.
The sync separator extracts Vsync from the composite sync
signal, which can come from either the sync slicer or the
HSYNCx inputs.
Rev. 0 | Page 16 of 44
The Hsync filter is used to eliminate any extraneous pulses
from the HSYNCx or SOGINx inputs, outputting a clean,
low-jitter signal that is appropriate for mode detection and
clock generation.
The Hsync regenerator is used to recreate a clean, although
not low jitter, Hsync signal that can be used for mode
detection and counting Hsyncs per Vsync.
The Vsync filter is used to eliminate spurious Vsyncs, main-
tain a stable timing relationship between the Vsync and Hsync
output signals, and generate the odd/even field output.
The coast generator creates a robust coast signal to allow the
PLL to maintain its frequency in the absence of Hsync pulses.
AD9984A
SOGOUT
HSYNC
VSYNC
COAST
COAST SELECT
0x18:7
DATACK
SOGIN0
EXTCK/COAST
VSYNC1
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
VSYNC0
HSYNC1
HSYNC0
HSOUT
VSOUT/A0
SOGIN1
HSYNC
SELECT
0x12:6
FILTERED
HSYNC
ACTIVITY
DETECT
ACTIVITY
DETECT
ACTIVITY
DETECT
ACTIVITY
DETECT
ACTIVITY
DETECT
ACTIVITY
DETECT
POLARITY
DETECT
POLARITY
DETECT
POLARITY
DETECT
POLARITY
DETECT
SYNC SLICER
SYNC SLICER
PLL CLOCK
GENERATOR
O/E FIELD
CHANNEL
SELECT
0x1E:6
HSYNC FILTER
AND
REGENERATOR
REGENERATED
HSYNC
SET
POLARITY
S
A
0
SET
POLARITY
HSYNC/VSYNC
COUNTER
REG 0x26,
0x27
SET
POLARITY
SET
POLARITY
VSYNC
FILTERED VSYNC
VSYNC FILTER EN
0x14:2
VSYNC
FILTER EN
0x14:2
PLL SYNC
FILTER EN
0x20:2
SP SYNC
FILTER EN
0x20:1
SOGOUT
SELECT
0x1D:1,0
MUX
Figure 9. Sync Processing Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9984APCBZ | High Performance 10-Bit Display Interface |
| AD9985A | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9985ABSTZ-110 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9985AKSTZ-110 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9985AKSTZ-140 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9984APCBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 10-Bit Display Interface |
| AD9984KSTZ-110 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9984KSTZ-140 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9984KSTZ-170 | 制造商:Analog Devices 功能描述: |
| AD9985 | 制造商:AD 制造商全稱:Analog Devices 功能描述:110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
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