參數(shù)資料
型號(hào): AD9984AKCPZ-140
廠商: ANALOG DEVICES INC
元件分類(lèi): 其它接口
英文描述: High Performance 10-Bit Display Interface
中文描述: SPECIALTY INTERFACE CIRCUIT, QCC64
封裝: 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64
文件頁(yè)數(shù): 28/44頁(yè)
文件大?。?/td> 490K
代理商: AD9984AKCPZ-140
AD9984A
Hex
Address
Rev. 0 | Page 28 of 44
Read/Write,
Read Only
Bits
6
Default
Value
*_** ****
Register Name
Description
HSYNC1 Detection.
0 = HSYNC1 is not active.
1 = HSYNC1 is active.
VSYNC0 Detection.
0 = VSYNC0 is not active.
1 = VSYNC0 is active.
VSYNC1 Detection.
0 = VSYNC1 is not active.
1 = VSYNC1 is active.
SOGIN0 Detection.
0 = SOGIN0 is not active.
1 = SOGIN0 is active.
SOGIN1 Detection.
0 = SOGIN1 is not active.
1 = SOGIN1 is active.
COAST Detection.
0 = External COAST is not active.
1 = External COAST is active.
CLAMP Detection.
0 = External CLAMP is not active.
1 = External CLAMP is active.
HSYNC0 Polarity.
0 = HSYNC0 polarity is negative.
1 = HSYNC0 polarity is positive.
HSYNC1 Polarity.
0 = HSYNC1 polarity is negative.
1 = HSYNC1 polarity is active high.
VSYNC0 Polarity.
0 = VSYNC0 polarity is negative.
1 = VSYNC0 polarity is positive.
VSYNC1 Polarity.
0 = VSYNC1 polarity is negative.
1 = VSYNC1 polarity is positive.
COAST Polarity.
0 = External COAST is negative.
1 = External COAST is positive.
CLAMP Polarity.
0 = External CLAMP is negative.
1 = External CLAMP polarity is positive.
Extraneous Pulse Detection.
0 = No extraneous pulses detected on Hsync.
1 = Extraneous pulses detected on Hsync.
Sync Filter Lock.
0 = Sync filter unlocked
1 = Sync filter locked.
MSBs of Hsyncs per Vsync count.
5
**_* ****
4
***_ ****
3
**** _***
2
**** *_**
1
**** **_*
0
**** ***_
0x25
RO
7
_*** ****
Sync Polarity Detect
6
*_** ****
5
**_* ****
4
***_ ****
3
**** _***
2
**** *_**
1
**** **_*
0
**** ***_
0x26
RO
7:0
Hsyncs per
Vsync MSBs
Hsyncs per
Vsync LSBs
Test Register 1
Test Register 2
Test Register 3
Test Register 4
Offset Hold
0x27
RO
7:4
LSBs of Hsyncs per Vsync count.
0x28
0x29
0x2A
0x2B
0x2C
R/W
R/W
RO
RO
R/W
7:0
7:0
7:0
7:0
7:5
1011 1111
0000 0010
000* ****
Must be written to 0xBF for proper operation.
Must be written to 0x02 for proper operation.
Read only bits for future use.
Read only bits for future use.
Must be written to default for proper operation.
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