- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373971 > AD9937KCP (ANALOG DEVICES INC) CCD Signal Processor with Precision Timing⑩ Generator PDF資料下載
參數(shù)資料
| 型號： | AD9937KCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | CCD Signal Processor with Precision Timing⑩ Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC56 |
| 封裝： | MO-220-VLLD-2, LFCSP-56 |
| 文件頁數(shù)： | 39/44頁 |
| 文件大?。?/td> | 410K |
| 代理商： | AD9937KCP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當(dāng)前第39頁第40頁第41頁第42頁第43頁第44頁
REV. 0
AD9937
–39–
RS, H2(A, B), LM
1
2
4
5
6
7
ODD FIELD
ODD FIELD
EVEN FIELD
1V
1H
t
DELAY3
t
SETTINGS2
t
PWR1
V1A/B, V2, V3A/B, V4, TG1A, TG1B, TG3A, TG3B,
OFD, H1(A, B, C, D)
VDD
(INPUT)
VD
(OUTPUT)
DIGITAL
OUTPUTS
VCKM
HD
(OUTPUT)
SERIAL
WRITES
VCLK
OUTCONT
(REGISTER
CONTROLLED)
INTERNAL
POWER-ON
AUTO-RESET
(LO-ACTIVE)
NOTES
1
THE INTERNAL POWER-ON AUTO RESET TIME
t
PWR
= 1.0ms REGARDLESS OF THE VCLK CLOCK FREQUENCY.
2
IT TAKES 500 s FOR VCLK TO SETTLE ONCE THE DIG_STBY REGISTER HAS BEEN PROGRAMMED.
3
IT TAKES FOUR VCKM CLOCK CYCLES FROM WHEN OUTCONT IS ASSERTED HIGH UNTIL THE VD, HD, AND DIGITAL OUTPUT DATAIS VALID.
Figure 37. Recommended Power-Up Sequence
POWER-UP FOR MASTER MODE
When the AD9937 is powered up, the following sequence is
recommended. (Refer to Figure 37 for each step.)
1. Turn on power supplies for AD9937.
2. The internal power-on auto-reset circuit will deassert
1.0 ms after VDD settles. (All internal registers are reset to
the default values.)
3. The VCKM clock can be applied as soon as VDD settles.
4. Reset the internal AD9937 registers: write a 0x000000 to
the SW_RESET register (addr 0x00). This will set all inter-
nal register values to their default values. (This step is optional
because the internal power-on reset circuit is applied at
power-up.)
5. Write a 1 to the DIG_STBY and AFE_STBY registers
(addr 0x02). This will put the digital and analog circuits into
the normal operating mode.
6. Program all control, system, and mode registers.
7. Write a 1 to the OUTCONT_REG (addr 0x01). This will put
the digital outputs into the normal operating mode. The inter-
nal OUTCONT will be asserted high on the rising edge of the
32nd SCK clock when writing to the OUTCONT_REG.
Table XVIII. Start-Up Polarities
(While OUTCONT = LO)
Output
OUTCONT = LO
V1A/B
V2
V3A/B
V4
TG1A
TG1B
TG3A
TG3B
OFD
H1(A
–
D)
H2(A, B)
LM
RS
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
LO
LO
LO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9937KCPRL | TVPS00RF-25-35PB W/ PC CONTACT |
| AD9942 | Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing⑩ Core |
| AD9942BBCZ | Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing⑩ Core |
| AD9942BBCZRL | Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing⑩ Core |
| AD9943 | Label Printer Tape RoHS Compliant: NA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9937KCPRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 10-Bit 3V 56-Pin LFCSP EP T/R 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9938BCBZ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9938BCPZ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9938KCP | 制造商:Analog Devices 功能描述:- Bulk |
| AD9940BCPZ | 功能描述:IC CDS TIMING DRIVE CONV 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。