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參數(shù)資料
| 型號(hào)： | AD9937KCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | CCD Signal Processor with Precision Timing⑩ Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC56 |
| 封裝： | MO-220-VLLD-2, LFCSP-56 |
| 文件頁數(shù)： | 19/44頁 |
| 文件大?。?/td> | 410K |
| 代理商： | AD9937KCP |
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REV. 0
AD9937
–19–
SDA
SCK
SLD
A
A
A
A
A
A
A
A
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
D
D
D
8 BIT
ADDRESS
START LOCATION
ADDRESS
D
D
D
D
D
D
D
DATA 0 [31:0]
D
D
D
D
DATA N [31:0]
12-BIT END
ADDRESS[11:0]
12-BIT START
ADDRESS [11:0]
8-BIT REG
ADDRESS [7:0]
32-BIT DATA 0 [31:0]
32-BIT DATA N [31:0]
1
1
1
2
END LOCATION
ADDRESS
1. ALL SLD PULSES ARE IGNORED UNTIL THE LAST BIT OF THE LAST DATA N WORD IS CLOCKED IN.
2. THE SLD PULSE MUST BE ASSERTED HIGH WHEN ALL SDA DATA TRANSMISSIONS HAVE BEEN COMPLETED.
Figure 6. System and Mode Register Writes
Internal Power-On Reset Circuitry
After power-on, the AD9937 automatically resets all internal
registers and performs internal calibration procedures. This
takes approximately 1 ms to complete. During this time, normal
clock signals and serial write operations may occur. However,
serial register writes are ignored until the internal reset opera-
tion is completed.
VD Synchronous and Asynchronous Register Operation
There are two types of control registers, VD synchronous and
VD asynchronous, as indicated in the Address column of Table I.
Register writes to synchronous and asynchronous type registers
operate differently as described in the following sections. All
writes to system, Mode_A, and Mode_B registers occur
asynchronously.
Asynchronous Register Operation
For asynchronous register writes, SDA data is stored directly
into the serial register at the rising edge of SLK. As a result,
register operation begins immediately after the register LSB has
been latched in on the rising edge of SCK.
VD Synchronous Register Operation
For VD synchronous type registers, SDA data is temporarily
stored in a buffer register upon completion of clocking in the
last register LSB. This data is held in the temporary buffer
register until the next rising edge of VD is applied. Once the
next rising edge of VD occurs, the buffered register data is
loaded into the serial register, and register operation begins.
See Figure 7.
Control registers at addresses 0x08, 0x09, 0x10, 0x11, and 0x12
are VD synchronous type registers.
VD
HD
VCKM
OPERATION OF VD SYNCHRONOUS TYPE
REGISTER WRITES BEGIN AT THE NEXT VD
RISING EDGE.
PROGRAMMING VD SYNCHRONOUS
TYPE REGISTERS MUST BE COMPLETED
AT LEAST FOUR VCKM CYCLES BEFORE
THE RISING EDGE OF VD.
Figure 7. VD Synchronous Type Register Writes
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| AD9943 | Label Printer Tape RoHS Compliant: NA |
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| AD9940BCPZ | 功能描述:IC CDS TIMING DRIVE CONV 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
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