參數(shù)資料
型號: AD9927BBCZRL
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: 14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, BGA128
封裝: 9 X 9 MM, LEAD FREE, MO-225, CSP_BGA-128
文件頁數(shù): 38/100頁
文件大?。?/td> 784K
代理商: AD9927BBCZRL
AD9927
Vertical Masking Using FREEZE/RESUME Registers
As shown in Figure 44 and Figure 45, the FREEZE/RESUME
registers are used to temporarily mask the V-outputs. The pixel
locations to begin the masking (FREEZE) and end the masking
(RESUME) create an area in which the vertical toggle positions
are ignored. At the pixel location specified in the FREEZE register,
the V-outputs are held static at their current dc state, high or low.
The V-outputs are held until the pixel location specified by the
RESUME register is reached, at which point the signals continue
with any remaining toggle positions, if any exist. Four sets of
Rev. 0 | Page 38 of 100
FREEZE/RESUME registers are provided, allowing the vertical
outputs to be interrupted up to four times in the same line. The
FREEZE and RESUME Positions 1 to 4 are enabled independently
and applied to all groups (Group A, Group B, Group C, and
Group D) using the VMASK_EN register.
Note that when masking is enabled, each group (Group A,
Group B, Group C, and Group D) uses the same FREEZE/
RESUME positions.
Note that the FREEZE/RESUME registers are also used as the
VALTSEL0 and VALTSEL1 registers during special vertical
alternation mode.
XV1
XV24
HD
NO MASKING AREA
0
Figure 44. No FREEZE/RESUME
XV1
XV24
HD
V-MASKING AREA
FREEZE
RESUME
NOTES
1. ALL TOGGLE POSITIONS WITHIN THE FREEZE/RESUME MASKING AREA ARE IGNORED. H-COUNTER CONTINUES TO COUNT DURING MASKING.
2. FOUR SEPARATE MASKING AREAS ARE AVAILABLE, USING FREEZE1/RESUME1, FREEZE2/RESUME2, FREEZE3/RESUME3, AND
FREEZE4/RESUME4 REGISTERS.
Figure 45. Using FREEZE/RESUME
0
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