參數(shù)資料
型號(hào)： AD9910
廠商： Analog Devices, Inc.
元件分類： XO, clock
英文描述： 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
中文描述： 1 GSPS的，14位，3.3伏的CMOS直接數(shù)字頻率合成
文件頁(yè)數(shù)： 54/60頁(yè)
文件大?。?/td> 764K
代理商： AD9910
AD9910
Bit(s)
12
Rev. 0 | Page 54 of 60
Descriptor
Clear Digital Ramp
Accumulator
Explanation
0 = normal operation of the DRG accumulator (default).
1 = asynchronous, static reset of the DRG accumulator. The ramp accumulator remains reset
as long as this bit remains set. This bit is synchronized with either an I/O update or a profile
change and the next rising edge of SYNC_CLK.
0 = normal operation of the DDS phase accumulator (default).
1 = asynchronous, static reset of the DDS phase accumulator.
Ineffective unless Bits<9:8> = 11
2
.
0 = normal operation of the OSK amplitude ramp rate timer (default).
1 = OSK amplitude ramp rate timer reloaded anytime I/O_UPDATE is asserted or a profile
change occurs.
The Output Shift Keying Enable bit.
0 = OSK disabled (default).
1 = OSK enabled.
Ineffective unless Bit 9 = 1.
0 = manual OSK enabled (default).
1 = automatic OSK enabled.
This bit is effective without the need for an I/O update.
0 = clock signals to the digital core are active (default).
1 = clock signals to the digital core are disabled.
0 = DAC clock signals and bias circuits are active (default).
1 = DAC clock signals and bias circuits are disabled.
This bit is effective without the need for an I/O update.
0 = REFCLK input circuits and PLL are active (default).
1 = REFCLK input circuits and PLL are disabled.
0 = auxiliary DAC clock signals and bias circuits are active (default).
1 = auxiliary DAC clock signals and bias circuits are disabled.
0 = assertion of the EXTPWRDN pin effects full power-down (default).
1 = assertion of the EXTPWRDN pin effects fast recovery power-down.
0 = configures the SDIO pin for bidirectional operation; 2-wire serial programming
mode (default).
1 = configures the serial data I/O pin (SDIO) as an input only pin; 3-wire serial
programming mode.
0 = configures the serial I/O port for MSB-first format (default)
1 = configures the serial I/O port for LSB-first format.
11
10
Clear Phase Accumulator
Load ARR @ I/O Update
9
8
7
6
5
4
3
2
1
OSK Enable
Select Auto OSK
Digital Power-Down
DAC Power-Down
REFCLK Input Power-Down
Auxiliary DAC Power-Down
External Power-Down
Control
Not Available
SDIO Input Only
0
LSB First
相關(guān)PDF資料
PDF描述
AD9910_07 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
AD9910BSVZ 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
AD9910BSVZ-REEL 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
AD9912 1 GSPS Direct Digital Synthesizer w/ 14-bit DAC
AD9913 Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9910/PCBZ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 1GSPS 14 bit DDS w/ parallel input port RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
AD9910_07 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
AD9910BSVZ 功能描述:IC DDS 1GSPS 14BIT PAR 100TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
AD9910BSVZ 制造商:Analog Devices 功能描述:IC DDS 1GHZ TQFP-100 制造商:Analog Devices 功能描述:IC, DDS, 1GHZ, TQFP-100
AD9910BSVZ-REEL 功能描述:IC DDS 1GSPS 14BIT PAR 100TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
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