參數(shù)資料
型號: AD9898KCPRL-20
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: TVPS00RF-21-41S W/ PC CON
中文描述: SPECIALTY CONSUMER CIRCUIT, QCC48
封裝: MO-220-VKKD-2, LFCSP-48
文件頁數(shù): 27/52頁
文件大?。?/td> 557K
代理商: AD9898KCPRL-20
REV. 0
AD9898
–27–
H1 AND H2 BLANKING
The AD9898 provides three options for controlling the period
where H1 and H2 pulses get blanked. These options are normal
H blanking, selective positioning for 2 H1 and H2 outputs, and
extended blanking. In all cases, HBLKMASK is used to set the
polarity of H1 during the blanking period. Table XIV describes
the registers used to control H blanking.
Normal H Blanking
For normal H blanking operation, HPULSECNT = 0 and
BLKMASK = 0 or 1. The HBLKHPOS register is not used in
this mode. Figure 23 shows one example where HBLKMASK = 0.
As seen in Figure 23, H1 and H2 are blanked while HD is Low.
Selective Positioning for Two H1 and H2 Outputs
For selective positioning operation, HPULSECNT = 1 and
HBLKMASK = 0 or 1. In this mode, two H1 pulses are output
during the blanking period. The location of these two pulses are
set using the HBLKHPOS register, as shown in Figure 24.
Extended Blanking
Extended blanking is enabled by setting HBLKEXT = 1. The
HBLKEXT register uses the 9-bit BL counter to suspend operation
of the HD and HL counters. This delays the blanking period by
the length set in the BLLEN register as shown in Figure 25.
Table XIV. H1 Blanking Registers
Register
Name
Bit
Width
Register Type
Description
Masking Polarity for H1 during Blanking Period
1
(0 = Low, 1 = High)
H Pulse Control during Blanking Period
(0 = No Output during Blanking, 1 = Output during Blanking)
H Pulse Blanking Extend Control
2
(0 = Extended Blanking Disabled, 1 = Extended Blanking Enabled)
Retimes the H1 HBLK to Internal Clock
(0 = Retiming Disabled, 1 = Retiming Enabled)
H1 Pulse ON Position during Blanking Period
HBLKMASK
HPULSECNT
1
1
Control (0x01)
Control (0x0A)
HBLKEXT
1
Control (0x0A)
H1BLKRETIME
1
Control (0x03)
HBLKHPOS
10
Sys_Reg(11)
NOTES
1
The polarity of H2 is always the opposite polarity of the H1 polarity.
2
The HBLKEXT extend control extends the blanking period by the number of counts set in the BLLEN register for the 9-bit BL counter.
1. THE RISING EDGE OF HBLK IS ALWAYS THE SAME AS HDRISE.
HD
HBLK
(INTERNAL)
H1
H2
RG
HDRISE
1
Figure 23. Normal H-Blanking Operation HBLKMASK = 0, HPULSECNT = 0, HBLKHPOS = xxx
相關(guān)PDF資料
PDF描述
AD9901 Ultrahigh Speed Phase/Frequency Discriminator
AD9901KP Ultrahigh Speed Phase/Frequency Discriminator
AD9901KQ TVS Diode; Diode Type:Bidirectional TVS; Stand-Off Voltage, VRWM:30V; Breakdown Voltage, Vbr:33.3V; Package/Case:DO-214AB; Leaded Process Compatible:Yes; No. of Lines Protected Max:1; Peak Pulse Power PPK @ 10x1000uS:1500W RoHS Compliant: Yes
AD9910 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
AD9910_07 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9899ARS-2 制造商:Analog Devices 功能描述:
AD9901 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrahigh Speed Phase/Frequency Discriminator
AD9901KP 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 20-Pin PLCC 制造商:Rochester Electronics LLC 功能描述:IC VHF PHCOMP AD9901 IC - Bulk 制造商:Analog Devices 功能描述:IC DISCRIMINATOR
AD9901KP-REEL 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 20-Pin PLCC T/R 制造商:Rochester Electronics LLC 功能描述:PHASE FREQ COMPARATOR IC - Tape and Reel
AD9901KPZ 功能描述:IC PHS/FREQ DISCRIMINATOR 20PLCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP(0.175",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR