- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11767 > AD9882AKSTZ-100 (Analog Devices Inc)IC INTERFACE/DVI 100MHZ 100LQFP PDF資料下載
參數(shù)資料
| 型號： | AD9882AKSTZ-100 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 22/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC INTERFACE/DVI 100MHZ 100LQFP |
| 標準包裝： | 1 |
| 應(yīng)用： | 視頻 |
| 接口： | 模擬，DVI |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
AD9882A
Rev. 0 | Page 29 of 40
Table 23. Active Vsync Override Settings
Override
Result
0
Autodetermines the active Vsync
1
Override; Bit 0 determines the
active Vsync.
The default for this register is 0.
0x10 0
Active Vsync Select
This bit is used to select the active Vsync when the override bit
is set (Bit 1).
Table 24. Active Vsync Select Settings
Select
Result
0
Vsync input
1
Sync separator output
The default for this register is 0.
0x11 7
Clamp Function
This bit enables/disables clamping.
Table 25. Clamp Input Signal Source Settings
Clamp Function
Function
0
Internally generated clamp enabled
1
Clamping disabled
0 enables the clamp timing circuitry controlled by clamp
placement and clamp duration. The clamp position and
duration is counted from the trailing edge of Hsync.
1 disables clamping. The three channels are clamped when the
clamp signal is active.
Power-up default value for clamp function is 0.
0x11 6
Red Clamp Select
A bit that determines whether the red channel is clamped to
ground or to midscale. For RGB video, all three channels are
referenced to ground. For YPbPr, the Y channel is referenced to
ground, but the PbPr channels are referenced to midscale.
Clamping to midscale clamps to Pin 74.
Table 26. Red Clamp Select Settings
Clamp
Function
0
Clamp to ground
1
Clamp to midscale (Pin 74)
The default setting for this register is 0.
0x11 5
Green Clamp Select
This bit determines whether the green channel is clamped to
ground or to midscale.
Table 27. Green Clamp Select Settings
Clamp
Function
0
Clamp to ground
1
Clamp to midscale (Pin 74)
The default setting for this register is 0.
0x11 4
Blue Clamp Select
This bit determines whether the blue channel is clamped to
ground or to midscale.
Table 28. Blue Clamp Select Settings
Clamp
Function
0
Clamp to ground
1
Clamp to midscale (Pin 74)
The default setting for this register is 0.
0x11 3
Coast Select
This bit is used to enable or disable the coast signal. If coast is
enabled, the additional decision of using the Vsync input pin
or the output from the sync separator needs to be made
(Register 0x10, Bits 1, 0). To disable coast, the user must set
Register 0x11, Bit 2 to 1 and Register 0x11, Bit 1 to 1.
Table 29. Coast Enable Settings
Select
Result
0
Coast disabled
1
Internally generated coast signal
The default for this register is 1.
0x11 2
Coast Input Polarity Override
This register is used to override the internal circuitry that
determines the polarity of the coast signal going into the PLL.
When disabling coast, Register 11, Bit 2 must be set to 1 and
Register 0x11, Bit 1 must be set to 1. This register works only
when coast is disabled. It does not work with internal coast.
Table 30. Coast Input Polarity Override Settings
Override Bit
Result
0
Coast polarity determined by chip
1
Coast polarity determined by user
The default for coast polarity override is 0.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9882KSTZ-100 | IC INTERFACE/DVI 100MHZ 100LQFP |
| MS27473E16B55PA | CONN PLUG 55POS STRAIGHT W/PINS |
| LTC4305IGN#TR | IC BUFFER BUS 2WR ADDRESS 16SSOP |
| VI-B43-IW-F2 | CONVERTER MOD DC/DC 24V 100W |
| AD9983AKCPZ-170 | IC INTRFACE 8BIT 170MSPS 64LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9882AKSTZ-140 | 功能描述:IC INTERFACE/DVI 100MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9882KS-140 | 制造商:Analog Devices 功能描述:LOW COST DUAL INTERFACE - Bulk |
| AD9882KST-100 | 制造商:Rochester Electronics LLC 功能描述:LOW COST DUAL INTERFACE - Bulk |
| AD9882KST-140 | 制造商:Analog Devices 功能描述:Interface for Flat Panel Display 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:LOW COST DUAL INTERFACE - Bulk 制造商:Analog Devices 功能描述:IC DUAL INTERFACE |
| AD9882KSTZ-100 | 功能描述:IC INTERFACE/DVI 100MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。