- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1894 > AD9859YSVZ-REEL7 (Analog Devices Inc)IC DDS DAC 10BIT 400MSPS 48TQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD9859YSVZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DDS DAC 10BIT 400MSPS 48TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 400MHz |
| 調(diào)節(jié)字寬（位）： | 32 b |
| 電源電壓： | 1.71 V ~ 1.96 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
AD9859
Rev. A | Page 17 of 24
AUTO Shaped On-Off Keying Mode Operation
The auto-shaped on-off keying mode is active when CFR1<25>
and CFR1<24> are set. When auto-shaped on-off keying mode
is enabled, a single scale factor is internally generated and
applied to the multiplier input for scaling the output of the DDS
core block (see Figure 18). The scale factor is the output of a
10-bit counter that increments/decrements at a rate determined
by the contents of the 8-bit output ramp rate register. The scale
factor increases if the OSK pin is high and decreases if the OSK
pin is low. The scale factor is an unsigned value such that all 0s
multiply the DDS core output by 0 (decimal) and 0x3FFF multip-
lies the DDS core output by 16383 (decimal).
For users who use the full amplitude (10-bits) but need fast
ramp rates, the internally generated scale factor step size
is controlled via the ASF<15:14> bits. Table 6 describes the
increment/decrement step size of the internally generated scale
factor per the ASF<15:14> bits.
A special feature of this mode is that the maximum output
amplitude allowed is limited by the contents of the amplitude
scale factor register. This allows the user to ramp to a value less
than full scale.
Table 6. Auto-Scale Factor Internal Step Size
ASF<15:14> (Binary)
Increment/Decrement Size
00
1
01
2
10
4
11
8
OSK Ramp Rate Timer
The OSK ramp rate timer is a loadable down-counter, which
generates the clock signal to the 10-bit counter that generates
the internal scale factor. The ramp rate timer is loaded with the
value of the ASFR every time the counter reaches 1 (decimal).
This load and countdown operation continues for as long as the
timer is enabled, unless the timer is forced to load before
reaching a count of 1.
If the load OSK timer bit (CFR1<26>) is set, the ramp rate
timer is loaded upon an I/O UPDATE or upon reaching a value
of 1. The ramp timer can be loaded before reaching a count of 1
by three methods.
Method one is by changing the OSK input pin. When the OSK
input pin changes state, the ASFR value is loaded into the ramp
rate timer, which then proceeds to count down as normal.
The second method in which the sweep ramp rate timer can be
loaded before reaching a count of 1 is if the load OSK timer bit
(CFR1<26>) is set and an I/O UPDATE is issued.
The last method in which the sweep ramp rate timer can be
loaded before reaching a count of 1 is when going from the
inactive auto-shaped on-off keying mode to the active auto-
shaped on-off keying mode; that is, when the sweep enable bit is
being set.
03374-0-005
OSK PIN
LOAD OSK TIMER
CFR1<26>
SYNC_CLK
AUTO DESK
ENABLE
CFR1<24>
TO DAC
AUTO SCALE
FACTOR GENERATOR
RAMP RATE TIMER
CLOCK
DDS CORE
OSK ENABLE
CFR<25>
AMPLITUDE SCALE
FACTOR REGISTER
(ASF)
0
1
01
HOLD
INC/DEC ENABLE
OUT
COS(X)
AMPLITUDE RAMP
RATE REGISTER
(ASF)
UP/DN
DATA
LOAD
EN
Figure 18. On-Off Shaped Keying, Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9880KSTZ-100 | IC INTERFACE/HDMI 100MHZ 100LQFP |
| AD9882KSTZ-140 | IC INTERFACE/DVI 100MHZ 100LQFP |
| AD9883ABSTZ-RL140 | IC INTERFACE FLAT 140MHZ 80LQFP |
| AD9887AKSZ-100 | IC INTRFACE ANALOG/DVI 160-MQFP |
| AD9887AKSZ-140 | IC INTRFACE ANALOG/DVI 160-MQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9859YSVZ-REEL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 10-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9860 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| AD9860BST | 制造商:Analog Devices 功能描述:Mixed Signal Front End 128-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10B MIXED SIGNAL FRONT END MXFE PROCESSO - Tape and Reel |
| AD9860BSTRL | 制造商:Analog Devices 功能描述:Mixed Signal Front End 128-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:10B MIXED SIGNAL FRONT END MXFE PROCESSO - Tape and Reel |
| AD9860BSTZ | 功能描述:IC PROCESSOR FRONT END 128LQFP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點(diǎn):- 封裝/外殼:48-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。