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參數(shù)資料
| 型號： | AD9845BJSTZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/24頁 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROC 12BIT 48LQFP |
| 標準包裝： | 2,000 |
| 類型： | CCD 信號處理器，12 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
REV.
B
–12–
AD9845B
0101...
0 = GAIN0, 1 = GAIN1, 2 = GAIN2, 3 = GAIN3
2323...
HD
LINE 0
LINE 1
LINE 2
LINE M
LINE M–1
LINE 0
LINE 1
LINE 2
LINE M
LINE M–1
EVEN FIELD
ODD FIELD
VD
Figure 16. PxGA Mode 5 (VD Selected) Frame/Line Gain Register Sequence
SHP
HD
5 PIXEL MIN
PxGA GAIN
GAIN0
GAIN1
GAIN0
NOTES
1. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES.
2. EVERY HD RISING EDGE WITH A PREVIOUS VD FALLING EDGE WILL RESET TO 0101.
3. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING EDGE WILL RESET TO 2323.
4. EVERY HD RISING EDGE WITHOUT A PREVIOUS VD RISING EDGE WILL REPEAT EITHER 0101... (EVEN) OR 2323... (ODD).
GAIN3
GAIN2
GAINX
3ns MIN
VD
3ns MIN
Figure 17. PxGA Mode 5 (VD Selected) Detailed Timing
FRAME N
VD
LINE 0
LINE 1
LINE 2
LINE M
0101...
1212...
0101...
LINE M–1
LINE 0
LINE 1
LINE 2
LINE M
0101...
1212...
0101...
LINE M–1
0 = GAIN0, 1 = GAIN1, 2 = GAIN2
FRAME N+1
HD
Figure 18. PxGA Mode 6 (Mosaic Repeat) Frame/Line Gain Register Sequence
SHP
HD
PxGA GAIN
GAIN0
GAIN1
GAIN0
NOTES
1. MINIMUM PULSEWIDTH FOR HD AND VD IS 5 PIXEL CYCLES.
2. BOTH VD AND HD ARE INTERNALLY UPDATED AT SHP RISING EDGES. MINIMUM SETUP TIME IS 3 ns.
3. EVERY HD RISING EDGE WITH A PREVIOUS VD RISING EDGE WILL RESET TO 0101.
4. EVERY HD RISING EDGE WITHOUT A PREVIOUS VD RISING EDGE WILL ALTERNATE BETWEEN 0101... AND 1212.
GAIN2
GAINX
GAIN1
3ns MIN
VD
3ns MIN
5 PIXEL MIN
Figure 19. PxGA Mode 6 (Mosaic Repeat) Detailed Timing
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| AD9846AJSTZRL | IC CCD SIGNAL PROC 10BIT 48LQFP |
| AD9847AKSTZRL | IC CCD SIGNAL PROC 10BIT 48-LQFP |
| AD9849AKSTZRL | IC CCD SIGNAL PROC 12BIT 48LQFP |
| AD9850BRS | IC DDS DAC W/COMP 125MHZ 28-SSOP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9846A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 10-Bit 30 MSPS CCD Signal Processor |
| AD9846AJST | 制造商:Analog Devices 功能描述:AFE VID 1ADC 10-BIT 3.3V 48LQFP - Bulk 制造商:Rochester Electronics LLC 功能描述:10 BIT 30 MSPS CCD SIGNAL PROCESSOR - Tape and Reel |
| AD9846AJSTRL | 制造商:Analog Devices 功能描述:AFE VID 1ADC 10-BIT 3.3V 48LQFP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:10 BIT 30 MSPS CCD SIGNAL PROCESSOR - Tape and Reel |
| AD9846AJSTZ | 功能描述:IC CCD SIGNAL PROC 10BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設(shè)備封裝:20-TSSOP 包裝:管件 |
| AD9846AJSTZRL | 功能描述:IC CCD SIGNAL PROC 10BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設(shè)備封裝:20-TSSOP 包裝:管件 |
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