參數(shù)資料
型號: AD9786BSVZRL
廠商: Analog Devices Inc
文件頁數(shù): 5/56頁
文件大?。?/td> 0K
描述: IC DAC 16BIT INTERPOL/SP 80TQFP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1,000
系列: TxDAC+®
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.25W
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 80-TQFP 裸露焊盤
供應商設備封裝: 80-TQFP-EP(12x12)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 500M
AD9786
Rev. B | Page 13 of 56
Group Delay
Number of input clocks between an impulse applied at the
device input and peak DAC output current. A half-band FIR
filter has constant group delay over its entire frequency range
Impulse Response
Response of the device to an impulse applied to the input.
Adjacent Channel Leakage Ratio (ACLR)
A ratio in dBc between the measured power within a channel
relative to its adjacent channel.
Complex Modulation
The process of passing the real and imaginary components of a
signal through a complex modulator (transfer function = ejwt =
coswt + jsinwt) and realizing real and imaginary components
on the modulator output.
Hilbert Transform
A function with unity gain over all frequencies, but with a phase
shift of 90° for negative frequencies and a phase shift of –90° for
positive frequencies. Although this function cannot be imple-
mented ideally, it can be approximated with a short FIR filter
with enough accuracy to be very useful in single sideband radio
architectures.
Complex Image Rejection
In a traditional two-part upconversion, two images are created
around the second IF frequency. These images are redundant
and have the effect of wasting transmitter power and system
bandwidth. By placing the real part of a second complex modulator
in series with the first complex modulator, either the upper or
lower frequency image near the second IF can be rejected.
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