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參數(shù)資料
| 型號： | AD9773AST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter |
| 中文描述： | SERIAL INPUT LOADING, 12-BIT DAC, PQFP80 |
| 封裝： | 1.40 MM HEIGHT, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 9/19頁 |
| 文件大?。?/td> | 218K |
| 代理商： | AD9773AST |
AD9773
9
PRELIMINARY TECHNICAL DATA
DEFINITIONS OF SPECIFICATIONS
Linearity Error (Also Called Integral Nonlinearity
or INL)
Linearity error is defined as the maximum deviation of
the actual analog output from the ideal output, deter-
mined by a straight line drawn from zero to full scale.
Differential Nonlinearity (or DNL)
DNL is the measure of the variation in analog value,
normalized to full scale, associated with a 1 LSB change
in digital input code.
Monotonicity
A D/A converter is monotonic if the output either
increases or remains constant as the digital input in-
creases.
Offset Error
The deviation of the output current from the ideal of
zero is called offset error. For I
OUTA
, 0 mA output is
expected when the inputs are all 0s. For I
OUTB
, 0 mA
output is expected when all inputs are set to 1s.
Gain Error
The difference between the actual and ideal output
span. The actual span is determined by the output
when all inputs are set to 1s, minus the output when all
inputs are set to 0s.
Output Compliance Range
The range of allowable voltage at the output of a cur-
rent-output DAC. Operation beyond the maximum
compliance limits may cause either output stage satu-
ration or breakdown, resulting in nonlinear perfor-
mance.
Temperature Drift
Temperature drift is specified as the maximum change
from the ambient (+25
°
C) value to the value at either
T
MIN
or T
MAX
. For offset and gain drift, the drift is
reported in ppm of full-scale range (FSR) per degree
C. For reference drift, the drift is reported in ppm per
degree C.
Power Supply Rejection
The maximum change in the full-scale output as the
supplies are varied from minimum to maximum speci-
fied voltages.
Settling Time
The time required for the output to reach and remain
within a specified error band about its final value,
measured from the start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to
undesired output transients that are quantified by a
glitch impulse. It is specified as the net area of the
glitch in pV-s.
Spurious-Free Dynamic Range
The difference, in dB, between the rms amplitude of
the output signal and the peak spurious signal over the
specified bandwidth.
Total Harmonic Distortion
THD is the ratio of the rms sum of the first six har-
monic components to the rms value of the measured
fundamental. It is expressed as a percentage or in deci-
bels (dB).
Signal-to-Noise Ratio (SNR
)
S/N is the ratio of the rms value of the measured out-
put signal to the rms sum of all other spectral com-
ponents below the Nyquist frequency, excluding the
first six harmonics and dc. The value for SNR is ex-
pressed in decibels.
Interpolation Filter
If the digital inputs to the DAC are sampled at a mul-
tiple rate of f
DATA
(interpolation rate), a digital filter
can be constructed which has a sharp transition band
near f
DATA
/2. Images which would typically appear
around f
DAC
(output data rate) can be greatly supressed.
Passband
Frequency band in which any input applied therein
passes unattenuated to the DAC output.
Stopband Rejection
The amount of attenuation of a frequency outside the
passband applied to the DAC, relative to a full-scale
signal applied at the DAC input within the passband.
Group Delay
Number of input clocks between an impulse applied at
the device input and peak DAC output current. A half-
band FIR filter has constant group delay over its entire
frequency range
Impulse Response
Response of the device to an impulse applied to the
input.
Adjacent Channel Power Ratio (or ACPR)
A ratio in dBc between the measured power within a
channel relative to its adjacent channel.
Complex Modulation
The process of passing the real and imaginary compo-
nents of a signal through a complex modulator (trans-
fer function = e
j
ω
t
= cos
ω
t+jsin
ω
t) and realizing real
and imaginary components on the modulator output.
Complex Image Rejection
In a traditional two part upconversion, two images are
created around the second IF frequency. These images
are redundant and have the effect of wasting transmit-
ter power and system bandwidth. By placing the real
part of a second complex modulator in series with the
first complex modulator, either the upper or lower
frequency image near the second IF can be rejected.
REV. PrA
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| AD9773EB | 12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter |
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相關代理商/技術參數(shù) |
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| AD9773BSV | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 12-bit 80-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:12BIT 160 MSPS DUAL TXDAC+ D/A CONVERTER - Bulk 制造商:Analog Devices 功能描述:IC 12-BIT DAC |
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| AD9773BSVZ | 功能描述:IC DAC 12BIT DUAL 160MSPS 80TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:TxDAC® 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD9773BSVZRL | 功能描述:IC DAC 12BIT DUAL 160MSPS 80TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:TxDAC® 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應商設備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD9773EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 160 MSPS 2】/4】/8】 Interpolating Dual TxDAC+ D/A Converter |
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