參數(shù)資料
型號(hào)： AD9763-EB
廠商： Analog Devices, Inc.
英文描述： 10-Bit, 125 MSPS Dual TxDAC+ D/A Converter
中文描述： 10位，125 MSPS的TxDAC系列雙D / A轉(zhuǎn)換
文件頁(yè)數(shù)： 16/28頁(yè)
文件大小： 460K
代理商： AD9763-EB
REV. B
AD9763
–
16
–
Worst case PSRR for either one of the differential DAC outputs
will occur when the full-scale current is directed towards that
output. As a result, the PSRR measurement in Figure 38 repre-
sents a worst case condition in which the digital inputs remain
static and the full-scale output current of 20 mA is directed to the
DAC output being measured.
An example serves to illustrate the effect of supply noise on the
analog supply. Suppose a switching regulator with a switching
frequency of 250 kHz produces 10 mV of noise and, for simplic-
ity sake (i.e., ignore harmonics), all of this noise is concentrated
at 250 kHz. To calculate how much of this undesired noise will
appear as current noise superimposed on the DAC’s full-scale
current, I
OUTFS
, one must determine the PSRR in dB using
Figure 38 at 250 kHz. To calculate the PSRR for a given R
LOAD
,
such that the units of PSRR are converted from A/V to V/V,
adjust the curve in Figure 38 by the scaling factor 20
×
Log
(R
LOAD
). For instance, if R
LOAD
is 50
, the PSRR is reduced
by 34 dB (i.e., PSRR of the DAC at 250 kHz, which is 85 dB in
Figure 38, becomes 51 dB V
OUT
/V
IN
).
Proper grounding and decoupling should be a primary objective
in any high speed, high resolution system. The AD9763 features
separate analog and digital supply and ground pins to optimize
the management of analog and digital ground currents in a
system. In general, AVDD, the analog supply, should be de-
coupled to ACOM, the analog common, as close to the chip as
physically possible. Similarly, DVDD, the digital supply, should
be decoupled to DCOM as close to the chip as physically possible.
For those applications that require a single +5 V or +3 V supply
for both the analog and digital supplies, a clean analog supply
may be generated using the circuit shown in Figure 39. The
circuit consists of a differential LC filter with separate power
supply and return lines. Lower noise can be attained by using
low ESR type electrolytic and tantalum capacitors.
100 F
10
–
22 F
0.1 F
TTL/CMOS
LOGIC
CIRCUITS
+5V
POWER SUPPLY
FERRITE
BEADS
AVDD
ACOM
ELECTROLYTIC
TANTALUM
CERAMIC
Figure 39. Differential LC Filter for Single +5 V and +3 V
Applications
APPLICATIONS
Using the AD9763 for Quadrature Amplitude Modulation
QAM is one of the most widely used digital modulation schemes
in digital communications systems. This modulation technique
can be found in FDM as well as spread spectrum (i.e., CDMA)
based systems. A QAM signal is a carrier frequency that is modu-
lated in both amplitude (i.e., AM modulation) and phase (i.e.,
PM modulation). It can be generated by independently modu-
lating two carriers of identical frequency but with a 90
°
phase
difference. This results in an in-phase (I) carrier component
and a quadrature (Q) carrier component at a 90
°
phase shift
with respect to the I component. The I and Q components are
then summed to provide a QAM signal at the specified carrier
frequency.
A common and traditional implementation of a QAM modula-
tor is shown in Figure 40. The modulation is performed in the
analog domain in which two DACs are used to generate the
baseband I and Q components. Each component is then typi-
cally applied to a Nyquist filter before being applied to a
quadrature mixer. The matching Nyquist filters shape and limit
each component’s spectral envelope while minimizing intersym-
bol interference. The DAC is typically updated at the QAM
symbol rate or possibly a multiple of it if an interpolating filter
precedes the DAC. The use of an interpolating filter typically
eases the implementation and complexity of the analog filter,
which can be a significant contributor to mismatches in gain and
phase between the two baseband channels. A quadrature mixer
modulates the I and Q components with the in-phase and
quadrature carrier frequency and then sums the two outputs to
provide the QAM signal.
Σ
DAC
CARRIER
FREQUENCY
10
10
TO
MIXER
NYQUIST
FILTERS
QUADRATURE
MODULATOR
DAC
DSP
OR
ASIC
0
90
Figure 40. Typical Analog QAM Architecture
In this implementation, it is much more difficult to maintain
proper gain and phase matching between the I and Q channels.
The circuit implementation shown in Figure 41 helps improve
upon the matching between the I and Q channels, as well as
showing a path for upconversion using the AD8346 quadrature
modulator. The AD9763 provides both I and Q DACs as well
as a common reference that will improve the gain matching and
stability. R
CAL
can be used to compensate for any mismatch in
gain between the two channels. The mismatch may be attrib-
uted to the mismatch between R
SET1
and R
SET2
, effective load
resistance of each channel, and/or the voltage offset of the con-
trol amplifier in each DAC. The differential voltage outputs of
both DACs in the AD9763 are fed into the respective differen-
tial inputs of the AD8346 via matching networks.
相關(guān)PDF資料
PDF描述
AD9763AST 10-Bit, 125 MSPS Dual TxDAC+ D/A Converter
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AD9764-EB 14-Bit, 125 MSPS TxDAC D/A Converter
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9763-EBZ 功能描述:BOARD EVAL FOR AD9763 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
AD9764 制造商:Analog Devices 功能描述:
AD9764AR 功能描述:IC DAC 14BIT 125MSPS 28-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線(xiàn)） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k
AD9764ARRL 功能描述:IC DAC 14BIT 125MSPS 28-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類(lèi)型:1 電流，單極；1 電流，雙極 采樣率（每秒）:*
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