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參數(shù)資料
| 型號： | AD9750AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 10-Bit, 125 MSPS High Performance TxDAC D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.035 us SETTLING TIME, 10-BIT DAC, PDSO28 |
| 封裝： | 0.300 INCH, SOIC-28 |
| 文件頁數(shù)： | 14/22頁 |
| 文件大?。?/td> | 302K |
| 代理商： | AD9750AR |
AD9750
–14–
REV. 0
R
LOAD
AD9750
MINI-CIRCUITS
T1-1T
OPTIONAL R
DIFF
IOUTA
IOUTB
Figure 28. Differential Output Using a Transformer
The center tap on the primary side of the transformer must be
connected to ACOM to provide the necessary dc current path
for both IOUTA and IOUTB. The complementary voltages
appearing at IOUTA and IOUTB (i.e., V
OUTA
and V
OUTB
) swing
symmetrically around ACOM and should be maintained with
the specified output compliance range of the AD9750. A differ-
ential resistor, R
DIFF
, may be inserted in applications in which
the output of the transformer is connected to the load, R
LOAD
,
via a passive reconstruction filter or cable. R
DIFF
is determined
by the transformer’s impedance ratio and provides the proper
source termination which results in a low VSWR. Note that
approximately half the signal power will be dissipated across R
DIFF
.
DIFFERENTIAL USING AN OP AMP
An op amp can also be used to perform a differential to single-
ended conversion as shown in Figure 29. The AD9750 is con-
figured with two equal load resistors, R
LOAD
, of 25
. The
differential voltage developed across IOUTA and IOUTB is
converted to a single-ended signal via the differential op amp
configuration. An optional capacitor can be installed across
IOUTA and IOUTB forming a real pole in a low-pass filter.
The addition of this capacitor also enhances the op amps distor-
tion performance by preventing the DACs high slewing output
from overloading the op amp’s input.
AD9750
IOUTA
IOUTB
C
OPT
500
V
225
V
225
V
500
V
25
V
25
V
AD8055
Figure 29. DC Differential Coupling Using an Op Amp
The common-mode rejection of this configuration is typically
determined by the resistor matching. In this circuit, the differ-
ential op amp circuit is configured to provide some additional
signal gain. The op amp must operate off of a dual supply since
its output is approximately
±
1.0 V. A high speed amplifier such
as the AD8055 or AD8057 capable of preserving the differential
performance of the AD9750 while meeting other system level
objectives (i.e., cost, power) should be selected. The op amps
differential gain, its gain setting resistor values, and full-scale
output swing capabilities should all be considered when opti-
mizing this circuit.
The differential circuit shown in Figure 30 provides the neces-
sary level-shifting required in a single supply system. In this
case, AVDD which is the positive analog supply for both the
AD9750 and the op amp is also used to level-shift the differ-
ential output of the AD9750 to midsupply (i.e., AVDD/2). The
AD8041 is a suitable op amp for this application.
AD9750
IOUTA
IOUTB
C
OPT
500
V
225
V
225
V
1k
V
25
V
25
V
AD8041
1k
V
AVDD
Figure 30. Single-Supply DC Differential Coupled Circuit
SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT
Figure 31 shows the AD9750 configured to provide a unipolar
output range of approximately 0 V to +0.5 V for a doubly termi-
nated 50
cable since the nominal full-scale current, I
OUTFS
, of
20 mA flows through the equivalent R
LOAD
of 25
. In this
case, R
LOAD
represents the equivalent load resistance seen by
IOUTA or IOUTB. The unused output (IOUTA or IOUTB)
can be connected to ACOM directly or via a matching R
LOAD
.
Different values of I
OUTFS
and R
LOAD
can be selected as long as
the positive compliance range is adhered to. One additional
consideration in this mode is the integral nonlinearity (INL) as
discussed in the ANALOG OUTPUT section of this data sheet.
For optimum INL performance, the single-ended, buffered
voltage output configuration is suggested.
AD9750
IOUTA
IOUTB
50
V
25
V
50
V
V
OUTA
= 0 TO +0.5V
I
OUTFS
= 20mA
Figure 31. 0 V to +0.5 V Unbuffered Voltage Output
SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 32 shows a buffered single-ended output configuration in
which the op amp U1 performs an I-V conversion on the AD9750
output current. U1 maintains IOUTA (or IOUTB) at a virtual
ground, thus minimizing the nonlinear output impedance effect
on the DAC’s INL performance as discussed in the ANALOG
OUTPUT section. Although this single-ended configuration
typically provides the best dc linearity performance, its ac distor-
tion performance at higher DAC update rates may be limited by
U1’s slewing capabilities. U1 provides a negative unipolar out-
put voltage and its full-scale output voltage is simply the
product of R
FB
and I
OUTFS
. The full-scale output should be set
within U1’s voltage output swing capabilities by scaling I
OUTFS
and/or R
FB
. An improvement in ac distortion performance may
result with a reduced I
OUTFS
since the signal current U1 will be
required to sink will be subsequently reduced.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9750ARRL | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 28-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:10 BIT 125 MSPS+ TXDAC D/A CONVERTER - Bulk |
| AD9750ARU | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 28-Pin TSSOP 制造商:Rochester Electronics LLC 功能描述:10 BIT 125 MSPS+ TXDAC D/A CONVERTER - Bulk |
| AD9750ARURL7 | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 28-Pin TSSOP T/R 制造商:Rochester Electronics LLC 功能描述:10 BIT 125 MSPS+ TXDAC D/A CONVERTER - Bulk |
| AD9750ARUZ | 功能描述:IC DAC 10BIT 125MSPS 28TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時(shí)間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD9750ARUZRL7 | 功能描述:IC DAC 10BIT 125MSPS 28TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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