參數(shù)資料
型號(hào): AD9750-EB
廠商: Analog Devices, Inc.
英文描述: 10-Bit, 125 MSPS High Performance TxDAC D/A Converter
中文描述: 10位,125 MSPS的TxDAC系列高性能D / A轉(zhuǎn)換
文件頁數(shù): 17/22頁
文件大小: 302K
代理商: AD9750-EB
AD9750
–17–
REV. 0
It is also possible to generate a QAM signal completely in the
digital domain via a DSP or ASIC, in which case only a single
DAC of sufficient resolution and performance is required to
reconstruct the QAM signal. Also available from several vendors
are Digital ASICs which implement other digital modulation
schemes such as PSK and FSK. This digital implementation has
the benefit of generating perfectly matched I and Q components
in terms of gain and phase, which is essential in maintaining
optimum performance in a communication system. In this imple-
mentation, the reconstruction DAC must be operating at a
sufficiently high clock rate to accommodate the highest specified
QAM carrier frequency. Figure 37 shows a block diagram of
such an implementation using the AD9750.
50
V
AD9750
LPF
50
V
TO
MIXER
12
COS
12
SIN
12
12
I DATA
Q DATA
12
CARRIER
FREQUENCY
12
STEL-1177
NCO
CLOCK
STEL-1130
QAM
Figure 37. Digital QAM Architecture
AD9750 EVALUATION BOARD
General Description
The AD9750-EB is an evaluation board for the AD9750 10-bit
D/A converter. Careful attention to layout and circuit design
combined with a prototyping area allow the user to easily and
effectively evaluate the AD9750 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9750 in
various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators, with the
on-board option to add a resistor network for proper load ter-
mination. Provisions are also made to operate the AD9750
with either the internal or external reference, or to exercise the
power-down feature.
Refer to the application note AN-420 for a thorough description
and operating instructions for the AD9750 evaluation board.
AD9750
(“I DAC”)
AD9750
(“Q DAC”)
REFIO
IOUTA
IOUTB
QOUTA
QOUTB
DCOM
FSADJ
SLEEP
R
1.9k
V
0.1
m
F
CLK
Q DATA
INPUT
I DATA
INPUT
DVDD
AVDD
100W
500
V
100
V
C
FILTER
100
V
C
FILTER
100
V
500
V
500
V
500
V
500
V
500
V
500
V
634
V
0.1
m
F
+5V
VPBF
BBIP
BBIN
BBQP
BBQN
AD8346
SPHASE
LOIP
LOIN
VOUT
500mV p-p WITH
V
CM
=1.2V
NOTE: 500
RESISTOR NETWORK - OHMTEK ORN5000D
100
V
RESISTOR NETWORK - TOMC1603-100D
REFLO
ACOM
REFLO
AVDD
REFIO
FSADJ
R
SET1
2k
V
R
CAL
220
V
U1
DAC
U2
DAC
AVDD
1.82V
LATCHES
500
V
+
LATCHES
Figure 36. Baseband QAM Implementation Using Two AD9750s
相關(guān)PDF資料
PDF描述
AD9750AR 10-Bit, 125 MSPS High Performance TxDAC D/A Converter
AD9750ARU 10-Bit, 125 MSPS High Performance TxDAC D/A Converter
AD9750 10-Bit D/A Converter(100MSPS,10位D/A轉(zhuǎn)換器)
AD9752* 12-Bit. 125 MSPS High Performance TxDAC D/A Converter
AD9752-EB 12-Bit, 125 MSPS High Performance TxDAC D/A Converter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9750-EBZ 功能描述:BOARD EVAL FOR AD9750 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率(每秒):- 數(shù)據(jù)接口:串行,SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
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AD9751ASTZ 功能描述:IC DAC 10BIT 300MSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散(最大):- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP,8-MSOP(0.118",3.00mm 寬) 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓,單極 采樣率(每秒):* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF)